Distributed quantum computing at QCE26 came down to the cost of a link

Toronto’s compilers cut tolls on a road still being built

This guide follows 34 talks on modular and distributed quantum computing at IEEE Quantum Week 2026 in Toronto. Almost every one priced the link between machines, and almost none could measure that price on real hardware.

IEEE Quantum Week 2026 seriesThis guide is one of 23 on the conference. IEEE Quantum Week 2026, the complete guide has the overview and links to every theme.

On the afternoon of Sunday 13 September, in Room 717B of the Metro Toronto Convention Centre, Mahdi Chehimi of the American University of Beirut put up a table about distributed quantum computing. It showed what happens when a quantum program is cut in two so that each half fits on a smaller machine. Every cut CZ gate multiplied the number of runs by nine. A job of 1,000 runs became 6.56 million at four cuts, and took 30 hours at six.

Chehimi’s table priced the idea at the centre of this field, which starts from the plain fact that useful quantum computers will need far more qubits than any one chip holds. A superconducting chip needs wires that run down into a fridge colder than deep space. Both the wires and the cold run out of room. They do so long before a chip gets as big as useful programs need, so the field wants one large machine built from many small ones, called modules, the way a supercomputer is built from linked servers.

The link between modules works like a toll road, and every crossing pays. Cut the program and the toll is paid in extra runs. Link the machines with shared entanglement and the toll is paid in Bell pairs, linked pairs of qubits that are slow to make and used up on each crossing. The 34 talks followed here suggest that the compilers have raced ahead of the road. Their savings are real, but they are measured against tolls that are assumed, because the hardware that would set them is still being built.

The case that distributed quantum computing has already arrived is a fair one. Circuit cutting needs no special hardware and runs on today’s machines, and Vinooth Kulkarni of Case Western Reserve University cited IBM’s split of a 142-qubit circuit over two processors joined by live classical links. On the Thursday, Abram Falk of IBM traced a roadmap in which chips were first joined by cables in 2024. Falk reported Bell pairs sent over microwave cables up to a metre long. On the Tuesday, David Nadlinger of Oxford said two linked ion traps had shared pairs at 98 percent fidelity and run a small search across the link. On that account the modules already exist, and the first links between them already carry Bell pairs.

The compilers that assume Bell pairs report striking savings. Enrico Russo of the University of Catania cut median link traffic by 59.7 percent on molecular circuits. Nikola Vuk Maruszewski of Northwestern University removed up to 98 percent of the gates between chiplets. Each saving rests on an assumed toll, such as a link swap set at four times the noise of a local one, or Bell pairs that always arrive. Luise Prielinger of TU Delft said plainly that their perfect pairs were unrealistic, and that a real success rate would be nearer one in 20.

The hardware talks put numbers on the road itself. Aharon Brodutch of IonQ found that splitting a trapped-ion machine still pays while a Bell pair takes about five times as long as a gate. Rob Stockill of QphoX reported a device that turns microwave signals into light at 14.5 percent per microwatt. Falk said such links must keep pace with error correction at megahertz rates, and that QphoX’s hardware repeats ten times more slowly.

Yet the strongest reason for modules may come from the factory more than from the physics. Maruszewski showed a yield plot in which single chips of 300 to 500 qubits come out with yields near zero, while modules of 20 or 60 qubits are easier to make. A plant that cannot make big chips will build small ones and link them, whatever the toll. Eleanor Rieffel of the University of Queensland offered the sober counterweight. The proven quantum savings in communication carry overheads too large for any real scale, Rieffel said, though networked sensors looked more hopeful.

The short version

What it is. Distributed quantum computing builds one large machine from several smaller ones. They are linked either by cutting the program into pieces or by shared entanglement in the form of Bell pairs.

What changed at QCE26. Compilers claimed large cuts in link traffic, from 59.7 percent to 98 percent. Nearly all of them assumed a link cost because few links yet run on working hardware.

The hardware gap. IBM has joined chips inside one fridge with cables up to a metre long. Linking separate fridges needs transducers that turn microwaves into light, and QphoX reported 14.5 percent per microwatt.

The limit. Only Oxford reported running even a two-qubit search across processors linked by entanglement. IBM’s 142-qubit split over two processors used classical links. The one live hardware demonstration, on room-temperature diamond machines, was stopped before it finished.

Distributed quantum computing by cutting circuits

Circuit cutting is the route that works today. A program is split into pieces that each fit on one machine, the pieces run separately, and an ordinary computer stitches the results back together. The stitching is statistical, so every cut multiplies the runs the answer needs. Five talks worked on keeping that bill down.

Beirut and Dresden set the price of a cut

Mahdi Chehimi of the American University of Beirut and Riccardo Bassoli of TU Dresden ran a Sunday tutorial on splitting one program across small processors. Chehimi began with cutting. Each cut CZ gate multiplies the runs by nine. Their table turned 1,000 runs into 6.56 million and 22 minutes at four cuts, and 30 hours at six.

Table of shot counts and run times for circuit cutting, rising ninefold with each cut CZ gate
Each cut CZ gate multiplies the runs by nine. At four cuts, 1,000 runs grow to 6.56 million, in a table from Mahdi Chehimi of the American University of Beirut and Riccardo Bassoli of TU Dresden.

Bassoli set out why entangled links are still far off. Bassoli said quantum links are still lab setups and are not expected on sale for about five years. The sources that make linked pairs turn out only thousands of bits a second, Bassoli said, and one firm’s link played up each time a train went by. Chehimi put gates that use shared pairs at about 300 times slower than a local gate, and their table of milestones included Oxford’s 2025 link between trapped-ion machines.

A scheduler that groups cuts made together

In the second half, Chehimi treated cutting as a scheduling problem. Their scheduler, published at QCNC this year, splits a job’s runs across machines while respecting the rule that the second half of a cut wire cannot start until the first half reports back. In their group’s simulations, under tight deadlines it served 12.8 percent more requests on average, and more than 23 percent more than greedy or random rules.

Comparison of shot multipliers for cutting five parallel CNOT gates one by one or all together
Cutting five CNOT gates as one group needs 3,969 times the runs, not 59,049. That is about 15 times fewer, from the work of Mahdi Chehimi and Riccardo Bassoli.

Grouping cuts made at the same moment gave the biggest saving. Five parallel CNOT cuts fell from 59,049 times the runs to 3,969, about 15 times fewer. On circuits of 16 to 42 qubits cut for 10-qubit machines, their partitioner beat IBM’s own Qiskit cutting add-on by 81 times on Ising circuits, though Chehimi said the edge shrinks as machines grow. Bassoli was gloomier. Any claim of advantage, Bassoli said, must count cooling, energy and cost.

Toronto searches for shapes that are cheap to cut

Pouya Kananian of the University of Toronto showed a search for circuit shapes that are cheap to cut but hard to simulate, a project done mostly by undergraduates in Hans-Arno Jacobsen’s group. The cost of cutting climbs fast with each cut. Tree-shaped circuits are cheap to cut, but a normal computer can simulate them, so the search looks for shapes in between.

A learning model builds candidate circuits gate by gate and learns by trial and reward. A second model predicts each circuit’s accuracy and cutting cost without running it, and the search keeps only the circuits that no other beats on both counts at once. Each is cut into four parts and tested in a small image classifier. In the reported run the tool made 80 circuits and kept five.

Lausanne reuses samples across circuits that differ only in angles

Sara Santos, a doctoral student at the École Polytechnique Fédérale de Lausanne, found a way to spend fewer runs on cut circuits. The paper is with Stefan Woerner and Julien Gacon of IBM Quantum in Zurich and Vincenzo Savona of Lausanne. A cut swaps one gate between two processors for a mix of local steps. The runs needed then grow with the square of a cost factor called gamma. But many programs need lots of circuits that share their gates and differ only in their angles, so Santos reuses the samples drawn for one circuit on the next, with each sample weighted by how much the two differ.

Quasi-probability cut of an RZZ gate with its sampling cost plotted against the rotation angle
The cost of cutting this gate grows as gamma squared. It stays cheap when the angle is small, from the work of Sara Santos, Stefan Woerner, Vincenzo Savona and Julien Gacon at EPFL and IBM.

The test was a small one, of 3 qubits and 2 layers. With no noise a standard method had the lower error. Once noise came in, the cut version won. Santos said the reuse can lower the quantum cost when a program needs many such terms, at the price of extra classical work, though the steep cost of the cut itself stays in place.

Turin plans cuts and error fixes together

Matteo Mendula of the Politecnico di Torino and CNIT reported that planning where to cut a circuit and how to clean up its errors at the same time gained 40.5 percent on deep circuits. Cutting alone lost 8.3 percent against running the full circuit. The paper is with Deborah Volpe, Fabrizio Riente, Giovanna Turvani and Carla Fabiana Chiasserini. Their tool, MOSAIQ, picks the cut points with a solver, weighing the size of the chip, a time budget and the penalty each cut adds.

Bar chart of ZZZ values on an IQM chip and IBM simulators, with and without cuts and error fixes
Cuts plus SPAM error fixes came out closest to the true value. The tests ran on a five-qubit IQM chip in Turin and on three IBM simulators, by Matteo Mendula and colleagues at the Politecnico di Torino.

The team cut circuits only in space, never in time, on IBM’s simulated machines and on Lagrange, a five-qubit IQM machine in Turin. Cutting plus a fix for errors in setting up and reading out the qubits came closest to the ideal answer. Time was tight. A one-hour budget ruled out the most accurate plans. Cuts in time, which Mendula said cost about ten times more, are left for later.

Barcelona cuts a 96-qubit circuit into 5,184 pieces

Mar Tejedor of the Barcelona Supercomputing Center showed a tool called Qdislib cutting a 96-qubit circuit four times. That gave 5,184 smaller circuits, each run in simulation, and 64 nodes of the MareNostrum 5 supercomputer ran them 54.4 times faster than one node did. The pieces do not depend on each other. That suits a scheduler that spreads tasks across many cores. Each cut wire multiplies the work by 8, and each cut gate by 6.

Qdislib run time for a cut 96-qubit circuit as more supercomputer nodes join in
Cut four times, a 96-qubit circuit took about 60,000 seconds on one node but about 1,100 on 64. That is 54.4 times as fast, in work by Mar Tejedor and Javier Conejero at BSC in Barcelona.

On enough nodes the cut circuit ran in about the 371 seconds an IBM cloud chip took for the uncut one. A notebook rebuilt a 16 by 16 image from two four-qubit halves, and at 20,000 shots it came out clean. At 1,000 it blurred. Tejedor warned that cutting adds noise from sampling, so it is a poor fit for any job already short of shots.

Compilers that place qubits across modules

The other route links modules with Bell pairs. A Bell pair lets one qubit be teleported to another machine, or lets a gate run across the gap, a trick called a telegate. Each use consumes the pair. Five talks built compilers that decide which qubits live where, so the program spends as few pairs as possible.

Catania cuts link traffic for chemistry by 59.7 percent

Enrico Russo of the University of Catania cut median link traffic by 59.7 percent on chemistry circuits split across linked cores. The paper won a best-paper award in the QSYS track. Their target was chemistry such as FeMoco, the core of the enzyme that bacteria use to fix nitrogen. That needs millions of qubits, and Russo said single chips will struggle to grow so far, so cores joined by links are the likely way to get there.

Chart of the link cost of chemistry circuits built by COSMA, set against the best fixed map
With Gray-inspired term order, the median link cost fell to 40.3 percent of the best fixed map. Size order gave 57.2 percent, in work by Enrico Russo and colleagues at Catania.

Their tool, COSMA, wraps a genetic algorithm around every free choice in the compile chain, from how electron orbitals map onto qubits to the order of the terms and which core each qubit lives on. Each candidate is scored by running the whole chain. Across 14 molecules it cut median link traffic by 59.7 percent against a standard baseline. Russo was frank that the cost model uses distance alone. The team said that reordering terms changes the simulation error in ways Russo did not model.

Northwestern removes up to 98 percent of chiplet gates

Nikola Vuk Maruszewski, a PhD student at Northwestern University, removed up to 98 percent of the gates between chiplets. First authorship was shared with Mingyoung Jessica Jeng. The talk also showed why chiplets matter. On one plot, big chips of 300 to 500 qubits almost never came out of the plant in working order, while small ones of 20 or 60 qubits were easier to make.

Bar chart of gates between chiplets with the SEQC compiler and with Qiskit
SEQC cut the gates between chips by 65 to 96 percent on average. On 100-qubit grid chips it hit 98.32 percent, in work by Nikola Vuk Maruszewski and colleagues at Northwestern.

Their compiler, SEQC, splits the job in two. A one-off stage assigns qubits to modules and places the swaps between them. A second stage, the only one rerun after the machine is recalibrated, routes each module in parallel. With swaps between modules set four times slower and noisier, SEQC cut gates between chiplets by 65 to 96 percent on average, and up to 98.32 percent. Total gate count and depth came out worse, which Maruszewski read as a sign that both are poor stand-ins for accuracy.

Case Western chooses between cutting and linking

Vinooth Rao Kulkarni, a PhD student at Case Western Reserve University, presented InterQ, a cloud scheduler that decides job by job whether to cut a circuit, link chips live or spend Bell pairs. Their co-authors were Jaehyun Lee, Lauren Li, Aaron Orenstein, Xinpeng Li, Shuai Xu, Daniel Blankenberg and Vipin Chaudhary. Plain cutting costs 16 times the samples per cut, Kulkarni said. Cutting with live classical links costs four times.

InterQ job plans for atom, IBM and IonQ machines that cut, use classical links or use quantum links
On IBM machines the classical link mode ran fastest. Quantum link modes had better success scores, in work by Vinooth Rao Kulkarni and colleagues at Case Western Reserve.

The scheduler groups jobs of similar depth, so that short ones do not wait and lose their state, and it cuts a job only when spare qubits exist and cutting improves both accuracy and finish time. Kulkarni described at least the IBM side as a simulation. Machines joined by quantum links scored a higher success rate than IBM devices joined by classical ones. IBM posted the shortest run time.

Toronto counts the Bell pairs chemistry needs

Grier Jones, a postdoc at the University of Toronto, counted how many Bell pairs chemistry circuits need when split across processors. The naive answer runs to a million. Jones looked at three versions of coupled-cluster circuits, a standard way to describe molecules, and counted every two-qubit gate that crosses between two or four parts. Each crossing gate costs a Bell pair.

Counts of two-qubit gates that cross two or four parts in coupled-cluster circuits for hydrogen chains
Built naively, these chemistry circuits would need 100 to 1,000,000 Bell pairs. The counts cover three coupled-cluster forms on hydrogen chains, from the work of Grier Jones at the University of Toronto.

A naive layout needed 100 to 1,000,000 Bell pairs. The largest version reached only 18 hydrogen atoms before the classical check got too costly to run. Extending the SABRE router to teleported gates changed the picture. With it, the lightest version needed only tens of Bell pairs, on tests that split up to 100 qubits over two and four processors.

Munich spreads a classifier over more processors

Jonas Stein of LMU Munich showed that a small classifier loses accuracy each time it is spread over more chips. Stein presented a colleague’s paper on telegates, in which a six-qubit circuit was trained on one simulated chip to sort handwritten digits into two groups and then run split across two, three or six chips. The task was a small one.

Test accuracy of a six-qubit quantum classifier split by distributed quantum computing over two, three and six processors
Spread over more chips, the score fell to near 0.75 with one link qubit per chip and near 0.85 with two. The work is by Jonas Stein and colleagues at LMU Munich.

The single-processor version always scored best, because every split adds remote steps. On six processors, accuracy sat near 0.75 with one link qubit per processor and near 0.85 with two, a gap Stein called small and not statistically clear at this size. All of it was simulated.

Routers that move qubits between chips

When a program does not fit the layout, a router shuffles qubits around with swaps until the qubits that must interact sit side by side. A swap across a link costs far more than one on a chip. Three teams built routers that know the difference. A fourth set when to make the pairs at all.

Imperial’s learning agent falls behind on dense circuits

Chien-Tung Kuo of Imperial College London trained a reinforcement learning agent, a program that learns by trial and reward, to split circuits between chips. Kuo presented work with Felix Burt, Samuel Yen-Chi Chen, Kin Leung and Kuan-Cheng Chen. In one move the agent picks a qubit, a source chip, a split or merge and a destination. A mask removes choices the layout forbids.

Bar chart of the splits a learning agent, DISQCO and other tools need on four kinds of circuit
The learning agent matched DISQCO on the Fourier transform. On dense quantum volume circuits it needed 28.7 splits, not 11.9, in work by Chien-Tung Kuo and colleagues at Imperial College London.

Simulated tests used two chips of four or eight qubits. Each split spends one entangled pair, so splits were the score. On the Fourier transform the agent matched the DISQCO baseline at four splits, but on dense circuits it needed 28.7 splits against 11.9, about twice as many. Kuo noted that the best reward still depends strongly on how the circuit is built.

Stuttgart cuts link cost by 52 percent on a 399-qubit layout

Afonso Azenha of the University of Stuttgart cut link cost by 52 percent on a 399-qubit IBM layout with a router that charges for every swap between processors. The work was with Ilia Polian and with Sebastian Brandhofer of IBM Quantum. Links between superconducting chips carry about ten times the error of links on one chip, Azenha said. Most routers treat the two kinds of link alike.

Table of routing cost and run time on a 399-qubit IBM layout for hypergraph methods and CLA-SABRE
On a 399-qubit layout, CLA-SABRE cut cost by 51.94 percent against SABRE. The hypergraph methods ran out of time, from Afonso Azenha and colleagues at the University of Stuttgart.

The team gave the standard SABRE router a penalty on each swap between processors. The penalty is paid back as the swap makes later gates local. On a 48-qubit machine of three processors, the method cut cost by 24.72 percent against the DMapS tool and ran 140 times faster. On a 399-qubit layout of three 133-qubit Heron cores, rival tools did not finish in three hours, while against plain SABRE the method cut cost by 51.94 percent at about a third of its speed.

Delft moves qubits along whole paths at once

Luise Prielinger of TU Delft built a router that finished circuits about 35 percent sooner by moving qubits along whole paths at once. Prielinger presented work with Joost Van Veen and Sebastian Feld. An earlier learning router moved qubits one link at a time, so many moves earned similar rewards and the agent had little to learn from, Prielinger argued.

Training curves of the old and new learning agents that route qubits between linked chips
The new agent finished 30-gate circuits in about 746 time steps, against 1,210 for the old one. It moves qubits along whole paths, from Joost Van Veen, Luise Prielinger and Sebastian Feld at TU Delft.

The new agent moves along whole paths instead, picking a chain of swaps along a shortest path, and simulated tests used two 16-qubit modules with entangled pairs that always succeed. Prielinger stressed that this is unrealistic. A real success rate would be nearer 0.05. On fresh 30-gate circuits the new agent still finished about 35 percent sooner than the old one, and training time fell by about 64 percent.

Amherst learns when to make entangled pairs

Filip Rozpedek of the University of Massachusetts Amherst presented a learned scheduler that cut a distributed circuit’s waiting time by up to about 68 percent on a ring of five nodes. Stav Haldar, now at the University of Texas at Arlington, led the project with Rozpedek and Sumeet Khatri of Virginia Tech. Each node has two qubits for links. A link works with some chance and decays as it ages, and the scheduler must keep a queue of gates between nodes supplied.

Wait time of a learned scheduler for entangled pairs against a swap rule on a ring of five chips
The learned policy cut waiting time by up to about 68 percent on a five-node ring. Above p of 0.5 it made links only on demand, from Stav Haldar, Filip Rozpedek and Sumeet Khatri.

The rival asks for every link and swaps along the path. Trained over about a million runs, the learned rule beat it, and once links worked more than half the time it made them only on demand. On a three-node circuit it tracked the exact best answer. Rozpedek said the simple tables it uses cannot go past five nodes, so deep learning is next.

Quantum data centres and tailored machines

Linking many modules turns a quantum computer into something like a data centre, with switches, photon sources and spare parts. Five talks looked at that scale, from network layouts to machines that survive losing a whole device.

Spare link qubits ease a QAOA jam

Samanvay Sharma added a QAOA workload to SwitchQNet, a network simulator from UC San Diego and Cisco. QAOA is a common way to tackle optimisation problems. The work was with Siyuan Niu, Rodney Van Meter, Amin Taherkhani and Michal Hajdušek. In the model a Bell pair inside a rack takes about 0.1 milliseconds and one across racks about 10, so a pair across racks takes 100 times as long as one inside a rack.

Bar chart of the share of Bell pairs crossing racks in SwitchQNet benchmarks with and without a QAOA workload
Adding QAOA raised the share of Bell pairs that cross racks from 18.2 to 30.2 percent. Those are the slowest pairs to make, from Samanvay Sharma and colleagues using SwitchQNet.

With one link qubit per chip, QAOA ran near 1.9 times their baseline delay. Six link qubits cut that to 1.2. Sharma said QAOA still gains from the simulator’s scheduling, but its traffic is too sparse to hide much of the delay that the links add, however clever the schedule.

Cisco simulates a data centre of 128 chips

A Cisco team simulated a quantum data centre of up to 128 chips. The paper is by Shahrooz Pouryousef, Eneet Kaur, Hassan Shapourian, Don Towsley, Ramana Kompella and Reza Nejabati. In their model, link qubits on each chip meet photon-pair sources and switches, and a detector checks each shared pair before it can be used in a program. Delay was the score. It is how much longer a split circuit takes than the same circuit on one chip.

With detectors on every switch, nearest-neighbour work stayed fairly flat as chips were added, while long-range work grew costlier. Under a fixed total budget of detectors the ranking moved, and at 128 chips a layout called QFly beat Clos while Fat-Tree still posted the lowest delay ratio. No layout won in every setting.

Nu Quantum survives the loss of a whole device

Evan Sutcliffe of Nu Quantum in Cambridge spread an error-correcting code over many small devices, so that losing a whole device is survivable. Sutcliffe presented work with Coral Westoby on rare events that wipe out a device at once, such as cosmic rays or plain hardware failure. The fix was tested in simulation. It flags the failure, swaps in a fresh device and lets ordinary error correction clean up. In the model, Bell pairs were ten times noisier than gates.

Logical error rate of a distance-6 toric code on one device, levelling off when the whole device can fail
A 1 in 10,000 chance per round that the device fails sets a floor under logical error. Circuit noise alone does not, from Evan Sutcliffe and Coral Westoby at Nu Quantum.

On a single device holding the whole code, a failure chance of one in 10,000 per round set a floor under the logical error rate near one in 1,000. The distributed versions dropped below it. A device could also be taken offline for calibration by teleporting its qubits to a spare, though the cost of the switching network was not counted.

Rieffel argues for machines built around one problem

Eleanor Rieffel of the University of Queensland gave the first talk of the Thursday workshop on linking machines. Rieffel directs the Queensland Quantum Decarbonisation Alliance. It has 27 partners and $30m from the state government and its partners, Rieffel said. Rieffel had doubts about linked computers, and said that when data is spread over a network the proven quantum savings in traffic cost too much to use.

List of the parts a quantum supercomputer could join
Eleanor Rieffel of Queensland drew up this list of parts a quantum supercomputer could mix. It runs from decoders and circuit knitting to memories and state factories.

Rieffel was more hopeful about sensors, such as telescopes that share linked states. Their guess is that the first quantum machines to make money will be built around one task and will mix many kinds of parts, as normal supercomputers mix CPUs and GPUs. Rieffel asked for cost sums that count energy, water and minerals.

Temple tunes a data centre’s layout to its workload

Yu Wang of Temple University found that a quantum data centre whose switches were laid out for its workload ran circuits in fewer time slots than layouts borrowed from classical data centres. Wang presented work led by doctoral student Jiyao Liu with Lei Fan, Yuanxiong Guo and Zhu Han. Each gate that crosses processors uses up one entangled pair. Links make pairs only by chance, so the wait for each layer of gates is random.

Latency of optical quantum data centre layouts under two goals on 16, 24 and 32-qubit circuits
The latency goal did better on 16 and 24-qubit circuits but could not solve 32. The noise goal went further, in work by Yu Wang and colleagues at Temple University.

The true goal was too hard to solve directly, so the team used two simpler scores and solved for ports, channels and paths. On circuits of 16 to 32 qubits over two to four racks, the tuned layouts beat fixed ones such as fat tree and QFly. Wang called the results early. A layout tuned to one workload may suit another poorly, and fidelity was left out.

Every number above rests on what a link costs. Five talks on the Thursday afternoon and four on the Tuesday set out what the hardware can do now.

Toronto stores one photon to wait for the other

Ada Warren, a postdoc at the University of Toronto, showed that storing one photon in a diamond memory beats waiting for two to arrive at once, unless storage error is high. Mitacs and IonQ fund the work. In the usual scheme both ends send a photon to a middle station and both must get there, so when each gets through only 1 to 10 percent of the time, as few as one try in 10,000 works.

A memory at the middle station holds the first photon until the second arrives. The success rate then grows in line with the arrival chance. The memory adds noise of its own. Assuming 10 percent arrival and about 1 percent gate error, the memory scheme won across the 1 to 10 percent range unless storage error was high, and asked what to improve first, Warren named the memory’s storage error.

IonQ finds splitting pays while pairs stay fast enough

Aharon Brodutch of IonQ asked whether a trapped-ion machine can still gain from being split. The work is with Evan Dobbs and Nicolas Delfosse of IonQ. Ion gates reach 99.99 percent fidelity at about 1,000 gates a second, Brodutch said, while today’s best interconnect takes about 5 milliseconds per Bell pair. That allows only about 200 remote gates a second.

The team linked processors in a ring and ran Clifford noise reduction, a partial error-correction scheme, that prepares and checks blocks of gates offline. In the split version each block is checked on its own processor while pairs build up. Run on three extra processors, the scheme matched single-machine error with about a third of the depth. At 85 qubits the gain held until a pair took about five times as long as a gate, a range Brodutch called reasonable for ions, though it assumes high pair fidelity. All results came from simulation.

IBM’s roadmap needs transducers

Abram Falk of IBM set out how the company means to join its chips and fridges, tracing the roadmap from Heron in 2023 and Flamingo in 2024, which joined chips with cables, to Loon in 2025. IBM’s plan then targets Starling in 2029 with 200 logical qubits, and Blue Jay in 2033 with 2,000 qubits.

IBM quantum roadmap from Heron in 2023 to the fault-tolerant Starling in 2029 and Blue Jay in 2033
The IBM roadmap runs from Heron in 2023 through Flamingo and Loon. Starling in 2029 has 200 qubits and Blue Jay in 2033 has 2,000, from the talk by Abram Falk of IBM.

Starling will string modules together inside one cooling system. Falk reported Bell pairs over microwave cables up to a metre long. Leaving one fridge is harder, because it needs a transducer, a device that turns a microwave photon into an optical one that can travel down fibre, and Falk put the best electro-optic ones at about 1 percent efficiency. Falk said no one has yet entangled superconducting qubits through one.

QphoX reports 14.5 percent per microwatt

Rob Stockill, co-founder and technical chief of QphoX, a TU Delft spin-off, said the firm’s transducer now converts 14.5 percent per microwatt of pump light. The published device managed about 1 percent. QphoX puts a tiny vibrating part, about 500 nanometres wide, between the microwave side and the light. That avoids the strong laser that would heat a fridge whose cooling is measured in microwatts.

QphoX microwave to optical transducer efficiency and added noise over time
Efficiency rose from 1 to 14.5 percent per microwatt, while added noise fell to 0.15 to 0.6 photons. Rob Stockill of QphoX gave the update.

Stockill gave about 30 percent at higher power, and added noise of 0.15 to 0.6 photons at lower efficiency. Stockill noted that higher efficiency usually brings more noise. The device can also emit a linked microwave and optical photon pair, though heat that builds up after each pulse holds that mode to about 0.05 percent.

Sherbrooke couples a magnet to a microwave circuit

Mathieu Juan of the Université de Sherbrooke and Institut quantique presented a magnetic transducer under the SilQ Connect name. Coupling a vibrating part to a microwave circuit through a moving gap usually stays below about 300 hertz. Their design puts a magnet on the moving part. The magnet changes the field through a superconducting loop, so the coupling grows with the field and could in principle go far higher than the usual designs reach.

Design of a magnet on a thin membrane that links microwave and light, beside other transducers
A magnet on a thin membrane links a microwave circuit to light in a cavity. Mathieu Juan of the Université de Sherbrooke set the SilQ Connect design beside other devices.

Juan expects 100 to 1,000 times the coupling of the usual designs, and has measured about 600 hertz so far. Juan projects about 50 percent efficiency from the first prototype, which is not yet fully built, and hopes to pass several qubits’ signals through one wide transducer in place of many narrow ones. The 50 percent figure is a projection.

QuEra treats one atom processor as a network

Nate Gemelke, co-founder and chief technology strategist of QuEra Computing, argued that one neutral-atom processor already acts like a network. Its steps span a vast range of times. Atoms interact in about 10 nanoseconds. A photon link between two processors takes 0.1 to 10 seconds, so the gap runs to many millions of times. Fast access to what is near and slow access to what is far are what make a network, Gemelke said, and one atom processor already has both.

Time scales in a neutral atom quantum computer, from fast atom gates to photon links
Inside one atom chip, steps take from 10 nanoseconds for a Rydberg gate to up to 10 seconds for a photon link. Nate Gemelke of QuEra set them beside classical networks.

QuEra now replaces lost atoms on the fly in a 3,000-atom machine, so it no longer runs shot by shot. Gemelke reported gate fidelities near 99.85 percent and a plan for a machine that can run a million logical steps on the cloud in 2028. A microscope’s field of view caps one processor at perhaps 100,000 atoms. Past that, processors must be linked by light.

Nu Quantum builds mirrors around a trapped ion

John Jarman of Nu Quantum said tiny optical cavities around trapped ions are enough to reach links of about 10 kilohertz at more than 97 percent fidelity. Nu Quantum sends one photon from each processor and detects both together, so the link rate grows with the square of how many photons are caught. Today that share is a few percent. The company wants tens of percent.

The cavity is two tiny mirrors held less than a millimetre apart around the ion. Their shape sets the trade. It governs how strongly the ion couples to the light and how fast the photons escape, and Nu Quantum aims for a finesse, a measure of cavity quality, of 200,000. The company has opened a lab for trapped-ion networks in Cambridge.

Oxford entangles two ion traps at 98 percent

David Nadlinger, a senior researcher in Oxford’s Ion Trap Quantum Computing group, reported entanglement at 98 percent fidelity between the group’s two trapped-ion nodes. Nadlinger thinks it is a world record. The two nodes have already run key sharing, clock tests, blind computing and remote gates. One of those was a two-qubit Grover search, run across the link.

Layout of a photonic chip with 94 light channels to link ion traps
The design fits 94 channels into 0.79 square centimetres for lattice surgery. Each channel makes 858 pairs a second, in work by David Nadlinger at Oxford.

Scaling up does not work directly. A study done mostly by a student at MIT found that a large surface code would need thousands to close to a million Bell pairs a second between modules, which with today’s lenses means square metres of optics. Nadlinger’s fix is a design on photonic chips. On paper it gives about 858 pairs a second per channel at fidelity above 99.9 percent. It exists only as a design.

IonQ says memories could cut link channels a hundredfold

A speaker from IonQ’s error-correction team showed in simulation that several trapped-ion modules can beat one processor while links stay up to about five times slower than a local gate. The pairs must be good. Inside a processor a gate reaches 99.99 percent fidelity in about 0.2 milliseconds, while the best link that uses light takes about 5 milliseconds per pair, at well under 99 percent. So links must be pooled and pairs cleaned up.

A newer link first stores entanglement in a quantum memory. With about 10 percent of photons reaching the detector, it cuts the parallel channels needed for a 10 kilohertz target by up to 100 times, by the team’s estimate. In the panel that followed, the IonQ speaker said the field has yet to run more than a simple two-qubit algorithm across two machines.

Error correction across modules

A large machine must correct its own errors, and the checks that span two modules cost Bell pairs. Four talks priced those checks and found them cheaper than feared, all on paper or in simulation.

RIKEN gives fast links only to the busiest logical qubits

Yasunari Suzuki of RIKEN said a modular machine that corrects its own errors can reach peak speed with 10 to 100 times fewer nodes. The trick is to give fast links only to the few logical qubits a program uses most. Steps between modules are slow. So a simple layout ends up waiting on its links, while a layout built on measurement hides that wait but needs a huge number of nodes.

Chart of how many nodes a networked quantum computer needs to reach peak speed
Most programs use a few logical qubits far more than the rest. Giving only those fast links cuts the nodes needed by 10 to 100 times, from Yasunari Suzuki at RIKEN.

Suzuki’s key point is that typical programs touch a few logical qubits far more than the rest. Is that just weak compilers? Asked that, Suzuki said the bias tracks the algorithm itself, and that both factoring and phase estimation, two of the main jobs such a machine would run, show it. Codes that pack more in, and a network that can be rewired, come next.

Durham checks the seams between processors less often

Sanidhya Gupta of Durham University split an error-correcting code across four processors joined by links that carry light. The paper is with Sanidhay Bhambay, Narges Alavisamani, Neil Walton and Thirupathaiah Vasantam. Checks that span two processors need Bell pairs. Pairs come at random, and the qubits that wait for them pick up noise all the while, so each check across the seam costs time as well as pairs.

Logical error rate against pair rate for a colour code split over four chips, at sizes 9 to 21
Checking the seams between chips every other round beat checking them every round. The plot spans code sizes 9 to 21, in work by Sanidhya Gupta and colleagues at Durham University.

Measuring those seam checks only every other round beat measuring them every round across most pair rates, for code sizes 9 to 21. Between checks the last result is copied forward, so neither the code nor the decoder has to change. Larger gaps win when pairs are scarce. The runs set remote steps ten times noisier than local ones.

Pittsburgh finds the seam barely moves the threshold

Nitish Kumar Chandra, a doctoral student at the University of Pittsburgh, simulated the step that joins two code patches on separate processors. The work was done at Cisco Quantum Labs with Reza Nejabati and Eneet Kaur. The links could be bad. Making the Bell pairs eleven times noisier moved the error threshold only from 0.8683 to 0.8339 percent.

Error thresholds for lattice surgery split over two chips as Bell pair noise grows
With Bell pair noise eleven times higher, the threshold fell only from 0.8683 to 0.8339 percent. The work is from Nitish Kumar Chandra of the University of Pittsburgh with Cisco Quantum Labs.

The reason is geometry. The bulk of a code grows with the square of its size, while the seam grows only in line with it, so the seam’s share shrinks as the code grows. Links of lower quality, needing less clean-up, could then still support error-corrected work. Chandra listed leaking qubits, slow pair rates and memory errors as untested.

Buffalo links two code patches with one Bell pair

Sean Grzenda of the University at Buffalo proposed NOBOL, a logical CNOT between code patches on two processors that uses a single physical Bell pair. The paper is with Shahram Babaie and Chunming Qiao. The usual method needs a number of pairs that grows with the square of the code distance, and each pair is slow and noisy to make. NOBOL uses two blocks of CNOT gates, local measurements and classical fixes, and Grzenda said it works for a broad family of codes called CSS codes.

Circuit for a logical CNOT between two chips that uses one Bell pair and classical fixes
NOBOL runs a logical CNOT between two processors with just one Bell pair. Local checks and classical fixes do the rest, from Sean Grzenda, Shahram Babaie and Chunming Qiao at the University at Buffalo.

There is a catch. Because the blocks are all CNOTs, one error can spread to the Bell pair, and Grzenda offered two fixes for that. The work is theory so far.

What the hardware makers plan

Two panels asked the firms building qubits how they mean to link them. Most want the biggest single machine first.

The co-design panel picks hubs and spokes

Akihito Soeda of Japan’s National Institute of Informatics chaired a panel on designing processors and networks together. On it sat Nate Gemelke of QuEra, John Jarman of Nu Quantum, Pranav Gokhale of Infleqtion and David Nadlinger of Oxford. All saw the link as the bottleneck. Gemelke wanted a rough draft of the whole machine early. Gokhale cited a result that error thresholds at the edge of the network can be about 99 percent where the core of a machine needs 99.9.

Jarman expected Nu Quantum’s link rates to rise from about 250 hertz to around 20 kilohertz. Nadlinger noted that entanglement can be stored, so the number of pairs a second matters more than how fast each one arrives. Layout came last. Gokhale said a hub with many spokes suits many near-term programs.

Three of four firms build one big machine first

Alexandra Moylett, who leads quantum error correction at Nu Quantum, asked four companies how linked designs fit their plans. Three said their first error-corrected machine will be one large system. Photonic was the exception. Its Daryus Chandra argued for growing up and out at once, with spin qubits in silicon linked by telecom photons. Aharon Brodutch said IonQ plans 256 qubits on its next chip and 10,000 on the one after, with links that use light between chips further off.

Panel of quantum hardware firms at IEEE Quantum Week 2026 in Toronto
Alexandra Moylett ran this panel on how to link chips. Daryus Chandra of Photonic speaks, and next to them sit Aharon Brodutch, Elie Gouzien, Madelyn Cain and Simone Eizagirre Barker.

Elie Gouzien of Alice & Bob saw linking as mostly a convenience. Madelyn Cain of Oratomic said a single atom system should run the first useful error-corrected programs. Brodutch said only one two-qubit gate across two nodes has been shown so far. Gouzien went further, saying the field should first factor a 2048-bit number on one big machine, and only after that should it start to link separate computers together.

What it means for anyone planning on modular machines

Anyone planning around modular quantum computers should take the relative gains here as real and the absolute costs as unknown. A compiler that saves 60 or 98 percent of link traffic is only as good as the toll it assumed, so ask what a Bell pair was taken to cost and how often it was taken to arrive. Prielinger’s honest one in 20 is a useful check against the many talks that assumed every pair succeeds.

The second question is timing. Bassoli does not expect quantum links on sale for about five years. Falk said no one has yet shown superconducting qubits entangled through a transducer, which is the step that would join two fridges and let a large machine grow past one cold box. For the firms that build these links, see our guide to quantum network companies. For a recent step in the hardware, read about the new IonQ link.

The factories favour modules, so modules will come whatever the links cost, and the compilers in these talks are already waiting for them. Yet three of the four hardware firms on Wednesday’s panel said their first error-corrected machine would be one large system, with links to come later. Until the transducers get better, every toll in these talks is a guess. The road itself is still being built.

Frequently asked questions

What is distributed quantum computing?

Distributed quantum computing builds one large quantum computer from several smaller ones, called modules. The modules are linked either by cutting a program into pieces joined by ordinary messages, or by shared entanglement that lets qubits and gates cross between machines. It matters because no single chip or ion trap can keep growing to the size useful programs need.

What is circuit cutting?

Circuit cutting splits a quantum program into pieces that each fit on one machine, runs them separately and stitches the results together on an ordinary computer. It works on today’s hardware. The cost is statistical, and at QCE26 Mahdi Chehimi showed each cut CZ gate multiplying the number of runs by nine.

What is a Bell pair in quantum computing?

A Bell pair is two qubits linked in a shared entangled state. With one Bell pair and a short classical message, a qubit can be teleported to another machine or a gate can run across the gap. Each use consumes the pair, so Bell pairs are the main cost of linking quantum modules.

Why do superconducting quantum computers need transducers?

Superconducting qubits work at microwave frequencies, while long cables between buildings or fridges carry light. A transducer converts a microwave photon into an optical one and back. At QCE26, QphoX reported 14.5 percent conversion per microwatt, and IBM said entangling superconducting qubits through a transducer has not yet been shown.

When will modular quantum computers be linked?

IBM’s roadmap, as Abram Falk presented it, targets Starling in 2029 with 200 logical qubits, built from modules inside one cooling system. Riccardo Bassoli of TU Dresden said Bassoli does not expect commercial quantum interconnects for about five years. Linking separate fridges still waits on transducers.

What happened at IEEE Quantum Week 2026?

IEEE Quantum Week 2026, also called QCE26, ran from 13 to 18 September at the Metro Toronto Convention Centre. This guide covers 34 of its talks on modular and distributed quantum computing. Most were compilers and simulations that assumed a cost for linking machines.

How this guide was put together.

This guide is based on 34 talks, tutorials and workshop presentations at IEEE Quantum Week 2026 (QCE26), held at the Metro Toronto Convention Centre from 13 to 18 September 2026, and on the published conference programme. Names follow the programme. Affiliations and titles not listed there are as speakers gave them. Results are stated as each speaker presented them, and nearly all are simulations or analysis with assumed link costs. Company claims are the companies’ own.


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Ivy Delaney

Ivy Delaney has been working with neural networks and machine learning since the mid-nineties, back when a couple of hidden layers and a long afternoon of training counted as ambitious. She has watched the field go from academic curiosity to the thing quietly running underneath everything, and she brings that long view to quantum computing. For Quantum Zeitgeist she covers the ground where the two fields meet. That means quantum machine learning and the variational algorithms it leans on, and it also means the less glamorous but more interesting story of classical machine learning already doing real work inside quantum machines, decoding error-correcting codes, calibrating noisy hardware and learning the error models that simulators depend on. She writes about the hardware those algorithms have to run on too, and about the post-quantum cryptography scramble that the same hardware has set off. Her stories typically start with the paper, whether that is peer-reviewed work, conference proceedings or an arXiv preprint, with the source linked so you can hold a claim up against the research it came from. She is unimpressed by benchmarks that will not say what they beat, and by demonstrations that only work in the press release.

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