SEALSQ Corp has received NIST Certificate No. 5463, officially validating its VaultIC408 version 1.2.4 as an active, single-chip hardware cryptographic module under the FIPS 140-3 Level 3 standard. The validation, issued August 5, 2026, and remaining active through August 4, 2031, provides an independently tested hardware-security building block for sensitive applications in government, defense, and critical infrastructure.
“The active FIPS 140-3 Level 3 validation of VaultIC408 gives our customers an independently validated hardware-security foundation,” said Carlos Moreira, CEO of SEALSQ, “for systems where the protection of device identities, cryptographic keys and sensitive operations cannot depend on software alone.”
VaultIC408 Achieves FIPS 140-3 Level 3 Validation for Hardware Security
The VaultIC408 secure element now meets stringent physical and logical security requirements, as confirmed by the U.S. National Institute of Standards and Technology’s (NIST) Cryptographic Module Validation Program (CMVP). This FIPS 140-3 Level 3 validation signifies extensive independent testing of the chip’s cryptographic algorithms, authentication protocols, and resistance to tampering, assuring customers of robust key management and data protection. Achieving this level requires demonstrating security measures that extend beyond software implementations, directly addressing vulnerabilities in increasingly complex systems.
This certification is especially important given the increasing demand for hardware-backed security in critical sectors, including government, defense, and infrastructure. According to SEALSQ, the validation strengthens its ability to serve customers where certified cryptographic protection is a fundamental technical and procurement necessity. The Level 3 validation specifically confirms the chip’s ability to protect device identities and sensitive operations within a secure semiconductor, a capability increasingly vital as reliance on connected devices expands.
SEALSQ’s commercial expansion plans are now bolstered by this independent verification, particularly within the United States and international markets. The rigorous testing process assessed not only the cryptographic functions of VaultIC408 version 1.2.4 but also its physical security, including resistance to environmental attacks and probing. This validation is expected to support deployments in environments requiring long-term product assurance, a growing concern as the threat landscape evolves and quantum computing looms. SEALSQ’s chips will anchor a secure quantum network, as reported on September 22.
The active FIPS 140-3 Level 3 validation of VaultIC408 gives our customers an independently validated hardware-security foundation for systems where the protection of device identities, cryptographic keys and sensitive operations cannot depend on software alone.
Carlos Moreira, CEO of SEALSQ
SEALSQ’s VaultIC408 Supports NIST-Approved Cryptographic Capabilities
The validated module supports an extensive portfolio of NIST-approved cryptographic capabilities, including AES, RSA, ECDSA, SHA-2, HMAC, elliptic-curve key agreement, key-derivation functions, and deterministic random-bit generation. The FIPS 140-3 Level 3 validation also streamlines security qualification for device manufacturers and system integrators, enabling them to incorporate a validated cryptographic module into their products and establish hardware-based trust at the point of manufacture, SEALSQ says.
SEALSQ views this certification as a key component of its broader strategy, combining secure semiconductors, PKI, provisioning services, and lifecycle identity management, while also reinforcing the engineering and industrial capabilities supporting its expanding post-quantum semiconductor portfolio.
FIPS 140-3 Validation Accelerates Government and Infrastructure Deployments
The rigorous testing underpinning NIST Certificate No. The company is actively positioning VaultIC408 to support applications demanding high security, including defense systems, critical infrastructure, and industrial IoT deployments, according to SEALSQ. This milestone provides customers, integrators, and government agencies with independent assurance that the chip meets requirements for protecting cryptographic keys and sensitive security parameters when properly installed and operated, according to SEALSQ.
Beyond government use, the standard is increasingly preferred by regulated industries and organizations handling mission-critical data, broadening the potential market for the secure element. “This certification confirms SEALSQ’s ability to deliver security technology designed for some of the world’s most demanding environments,” the company stated.
These partnerships demonstrate a broader strategy combining secure semiconductors, post-quantum cryptography, and a growing network of quantum infrastructure.
Governments, defense organizations, critical-infrastructure operators and global technology companies increasingly need security that begins inside the hardware.
Carlos Moreira, CEO of SEALSQ
QS7001 Roadmap Advances SEALSQ’s Post-Quantum Semiconductor Strategy
SEALSQ is extending its hardware security validation program beyond FIPS 140-3 Level 3 certification for VaultIC408, with a roadmap focused on the QS7001 post-quantum secure element. This expansion demonstrates a commitment to building a comprehensive strategy encompassing secure semiconductors, public key infrastructure, provisioning services, and lifecycle identity management. The company is using expertise gained from its secure-element portfolio to develop next-generation protection against emerging quantum-computing threats, offering organizations a path to deploy robust, certified hardware security now while preparing for post-quantum cryptography.
The QS7001 roadmap isn’t solely focused on product certification; it’s designed to establish a new generation of hardware Root of Trust capable of safeguarding identities, devices, machines, and critical infrastructure. SEALSQ intends to deliver a secure element specifically engineered for the post-quantum era, supported by internationally recognized security evaluations and certifications.
This strategy acknowledges that the transition to post-quantum security requires more than software solutions, necessitating a secure hardware foundation, trusted provisioning, and cryptographic agility throughout a device’s lifecycle, the firm reports. “The transition to post-quantum security will not happen through software alone,” said Moreira. “It requires a secure hardware root of trust, trusted provisioning and cryptographic agility across the entire lifecycle of each connected device.” Currently, SEALSQ is concurrently advancing certification for its QVault TPM family, including both TCG and FIPS 140-3 milestones planned through 2027.
This proactive approach anticipates the growing need for quantum-resistant security as connected infrastructure expands and quantum computing capabilities mature. By embedding post-quantum cryptography directly into its semiconductor solutions, SEALSQ aims to ensure organizations remain protected against future quantum threats, enhancing resilience across diverse industries. 5463, achieving an overall security rating of FIPS 140-3 Level 3. SEALSQ’s work is positioning the company to build the bridge between the cybersecurity requirements of today and the quantum-resistant infrastructure of tomorrow.
The transition to post-quantum security will not happen through software alone. It requires a secure hardware root of trust, trusted provisioning and cryptographic agility across the entire lifecycle of each connected device.
Carlos Moreira, CEO of SEALSQ
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