Riverlane, a leader in quantum hardware development, has published a white paper outlining its methods for designing a scalable error-correction solution. Their operating system, Deltaflow. Decode addresses the challenges of quantum computing with regard to speed, scalability, and simulation. Their infrastructure allows for accelerated prototyping and simulation of decoders, starting with high-level models of error correction schemes, followed by accurate simulations of potential decoding hardware and then implementation and testing of the dedicated hardware.
According to studies, utility-scale fault-tolerant quantum computers will generate terabytes of QEC data per second. The computer has to process this data at speed it generates to reduce computation times and data backlog. Also, preserving quantum information and performing fault-tolerant computation requires resolving multiple rounds of syndromes quickly.
Existing solutions do not address scalability. Code distance is increased to suppress the errors in the system, but at a distance greater than seven, codes become intractable in real time because of the large volume of data required to be processed in a single cycle. As a result, there will always be a limit distance beyond which the hardware cannot keep up with data acquisition, regardless of how quickly the decoder implementation is implemented. Thus making decoding more challenging.
Riverlane confronts these problems by designing dedicated decoding hardware for processing the syndrome data in real-time and effectively distributing their decoder across several cores without compromising accuracy. This affords them a bandwidth that is only constrained by the number of conventional resources that can be allocated to the task.
They also compared their multi-core decoder’s frequency to the conventional serial method. With a reasonable amount of cores, they expect to be able to decipher classically difficult distance 11 codes. Their decoder’s extra bandwidth is useful for overcoming more complex problems encountered when performing logical operations needed for generating entangled qubits.
Riverlane also designed the decoder to tolerate noise from the syndrome extraction circuit to ensure good logical performance. After simulating the decoder’s logical error rate using a realistic circuit-level noise model, errors decrease exponentially as code distance increases.
They compared their decoder with the Union-Find algorithm, one of the best for real-time decoding, and Riverlane’s was 60 to 80% faster on decoding tasks. Compared to minimumweight perfect matching (MWPM) -the industry standard for decoding surface code, Riverlane’s decoder has a slightly higher logical error rate but equally performs well.
They also tested the decoder using data from the quantum computer made public by Google Quantum AI. On the experimental data, Riverlane’s decoder works quite well, with MWPM slightly outperforming it in terms of logical error rate.
Therefore, their decoder can handle practical problems and help their hardware partners achieve fault tolerance. The Riverlane decoder is poised to set a new industry record for decoding speed and can be expanded to address complicated decoding issues.
