Diraq has demonstrated a path to achieving 1,000 logical qubits with just 150,000 physical qubits, a performance enabled by Iceberg Quantum’s Pinnacle architecture and detailed in Diraq’s white paper, The Case for Silicon, the company says. This result challenges the expectation that quantum low-density parity-check architectures demand more complex hardware than surface code approaches.
The collaboration used early access to NVIDIA CUDA-Q Logical to successfully map Pinnacle to Diraq’s silicon spin-qubit platform while minimizing error accumulation from qubit movement. “This work demonstrates that we can place the most advanced fault-tolerant error-correction technology on top of our hardware, increasing the projected logical performance of each device by an order of magnitude,” said Diraq’s CEO and Founder, Andrew Dzurak.
Pinnacle Architecture Achieves 1,000 Logical Qubits with Diraq Spin Qubits
Shuttling distances between qubits presented a key challenge in mapping the Pinnacle architecture onto Diraq’s silicon spin qubit hardware, demanding precise control to minimize error accumulation during qubit movement. Numerical simulations incorporating these shuttling-dependent noise factors confirmed logical performance suitable for practical quantum computation, validating the implementation’s viability. This successful mapping demonstrates that Pinnacle’s low overhead and logical performance are attainable using spin qubits, a significant step toward scalable fault-tolerant quantum systems.
Physical qubit counts from the Pinnacle design aligned with hardware-aware estimates on Diraq’s system to within a five percent margin, demonstrating a high degree of accuracy in the mapping process, according to the company. Diraq, founded in 2022 and headquartered in Sydney, Australia, builds silicon spin qubit processors on standard CMOS foundry lines, aiming for millions of qubits on a single chip at under a dollar per qubit, a goal supported by more than 150 million dollars in funding.
The integration of Pinnacle with Diraq’s hardware is facilitated by NVIDIA CUDA-Q Logical, a new software layer that allows for flexible expression of the architecture across different hardware platforms. “We have successfully demonstrated that Pinnacle’s logical performance advantage is achievable on Diraq’s hardware, and have carried the hardware mapping through to end-to-end compilation using NVIDIA CUDA-Q,” said Felix Thomsen, CEO and co-founder of Iceberg Quantum.
“CUDA-Q’s new logical layer gives us a flexible framework for expressing Pinnacle across distinct and evolving hardware platforms, without tightly coupling it to any one.” This cross-stack collaboration underscores the importance of co-design in accelerating the development of useful quantum systems.
This work demonstrates that we can place the most advanced fault-tolerant error-correction technology on top of our hardware, increasing the projected logical performance of each device by an order of magnitude.
Andrew Dzurak, CEO and Founder, Diraq
Non-Local Connectivity of Pinnacle Optimized for Diraq Hardware
Mapping Iceberg Quantum’s Pinnacle architecture to Diraq’s silicon spin qubits presented a specific engineering challenge: maintaining qubit coherence during movement across the processor. Minimizing shuttling distances was important, as error accumulation increases with each physical displacement of a qubit, a factor carefully addressed in the implementation of Pinnacle within Diraq’s system. The modular design of Pinnacle proved advantageous, confining the need for non-local connectivity to individual processing blocks rather than the entire device, simplifying the optimization process and reducing potential error rates.
Codes, circuits, and shuttling schedules were then refined within each block to ensure that qubit movement contributed minimally to the overall error budget, aligning with Diraq’s stringent performance requirements, the firm reports. The collaboration highlights a shift towards rapid co-design in quantum computing, where theoretical advancements are swiftly tested against real-world hardware limitations.
We have successfully demonstrated that Pinnacle’s logical performance advantage is achievable on Diraq’s hardware, and have carried the hardware mapping through to end-to-end compilation using NVIDIA CUDA-Q.
Felix Thomsen, CEO and co-founder of Iceberg Quantum
NVIDIA CUDA-Q Logical Enables End-to-End Compilation and Resource Estimates
NVIDIA CUDA-Q Logical facilitated a detailed resource estimation for Iceberg Quantum’s Pinnacle architecture when implemented on Diraq’s silicon spin qubits, revealing a discrepancy of only five percent between predicted and hardware-aware physical qubit counts. This level of alignment validates Pinnacle’s low overhead and logical performance potential on a practical hardware platform, a finding detailed in a collaborative effort using early access to the NVIDIA platform.
The ability to map logical circuits directly to physical operations represents a step toward realizing useful quantum computation with this error-correction scheme. This end-to-end compilation process avoids the need to rebuild compilation machinery for each iteration, accelerating the co-design of quantum algorithms and hardware. This adaptability supports long-term scalability and innovation.
Sam Stanwyck, Director of Quantum Product at NVIDIA, highlighted the broader implications of this collaboration. “Fault-tolerant quantum computing will advance faster when researchers can test new codes and architectures against real hardware constraints before the hardware is built,” Stanwyck stated.
Fault-tolerant quantum computing will advance faster when researchers can test new codes and architectures against real hardware constraints before the hardware is built.
Sam Stanwyck, Director of Quantum Product at NVIDIA
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