A neural network predicts quantum-dot shapes with 0.6% error

Researchers have developed a framework that predicts the shapes of semiconductor quantum dots with a remarkably low 0.6% error. The team, including Marek Rychetský of the University of Oxford and Valentin Duruisseaux of the California Institute of Technology, uses a Fourier Neural Operator (FNO) as a rapid surrogate for complex simulations. This approach allows for the joint optimisation of both gate voltages and electrode layout, a key distinction from previous design methods. Compared to traditional CPU-based physics simulators, the FNO achieves a 17,000-fold speed-up on GPU.

FNO Predicts Quantum-Dot Charge Density with 0.6% Accuracy

The framework’s predictions of two-dimensional charge-density fields deviate from reference data by only 0.6% as measured by a relative $L^2$ test error, a level of precision previously difficult to achieve in modelling semiconductor quantum dots. The system’s ability to accurately predict charge distribution is critical because these distributions define the target geometry for quantum-dot design, enabling more precise qubit engineering. The FNO reproduces charge densities with a relative $L^2$ test error of just 0.6% and enables millisecond-scale differentiable evaluations.

The differentiable inverse co-design framework relies on a Fourier Neural Operator (FNO) as a surrogate model, replacing computationally intensive semiclassical Thomas-Fermi electrostatic simulations. This substitution allows for millisecond-scale differentiable evaluations, a significant improvement over traditional CPU-based simulators, and enables a 17,000-fold speed-up on GPU for a single design. Gradients from the loss function propagate through the FNO, enabling optimisation of both geometry and voltage parameters.

Thomas-Fermi Simulation as Reference for FNO Training

The Fourier Neural Operator (FNO) employed in this work uses the inherent characteristics of gate-defined electrostatics through its global receptive field, allowing information to propagate across the entire simulation domain. This feature is critical for accurately modelling quantum dot behaviour. This global reach contrasts with methods limited to local interactions, as even minor adjustments to gate geometry or voltage can significantly influence charge confinement across a wider area. The FNO’s architecture is designed to capture these long-range dependencies.

The network functions as a fixed, differentiable forward model after training, enabling efficient gradient calculations essential for inverse design optimisation, a process where desired device properties drive the optimisation of physical parameters. The FNO accepts a two-dimensional field representing normalised gate voltages as input, with regions outside the gates assigned a fixed background value, and outputs the corresponding charge-density field, denoted as ${\rho }_{FNO}(x,y)$ = $F_{\phi }$[a](x,y). This approach ensures the neural network learns to approximate the behaviour of the underlying physics, rather than memorising specific configurations, and allows for extrapolation to novel designs.

FNO Enables 17,000-Fold Speed-Up in Device Evaluation

A Fourier Neural Operator (FNO) now enables millisecond-scale evaluations of semiconductor quantum dot designs, a speed previously unattainable with traditional methods. The ability to rapidly evaluate designs is important because the complexity of semiconductor quantum dot devices, arising from multiple gate electrodes, device variability and inherent disorder, has historically hindered automated characterisation and control. Machine-learning surrogate models offer a solution by learning the relationship between design parameters and simulated responses, allowing for quick assessment after initial training.

This FNO functions as a learned transformation of spatial Fourier modes, providing a global perspective and adaptability to different spatial resolutions. “The trained FNO provides a fast, differentiable surrogate for inverse design,” the researchers state, reproducing reference charge-density fields with high accuracy. This speed and precision allow for inverse design, where the desired spatial distribution of confined charge dictates the target quantum dot geometry. The framework successfully generates both vertically and horizontally elongated double-dot confinement geometries from identical starting conditions, demonstrating its versatility.

Gradient-Based Design Optimizes Quantum-Dot Confinement

The FNO’s field-to-field formulation captures electrostatic potential response while providing the differentiability and computational efficiency needed for gradient-based design, a technique previously applied to electromagnetic and photonic devices. The work’s primary goal is to realize controlled, bespoke quantum-dot confinement geometries, as these profiles can influence qubit-relevant properties. Researchers constructed an electrostatic model from a Ge/SiGe double quantum-dot device, using reported heterostructure and gate layout characteristics, similar to the approach used to connect electrostatic confinement to experimentally measured g-factor response.

While this modeling approach maps gate-electrode geometry and applied voltages to hole density, it did not initially provide gradients of the density with respect to the geometry and voltages, a requirement for gradient-based inverse design. “Different confinement geometries can, in turn, influence qubit-relevant properties,” the paper states, noting that future extensions could directly optimize properties like g-factor and inter-dot coupling using required quantum-mechanical models. The framework’s ability to produce these geometries represents a step towards more targeted control over qubit characteristics, without explicitly modeling those properties at this stage.

Hole-Based Quantum Dots in Ge/SiGe Heterostructures

The FNO’s ability to predict charge density with such fidelity allows for the rapid generation of bespoke double-dot confinement profiles, an essential step towards realizing targeted qubit properties. Researchers demonstrated the framework’s capability by successfully generating both vertically and horizontally elongated double-dot configurations, a feat previously requiring extensive fabrication and testing cycles. This joint optimisation process, applied to Ge/SiGe heterostructures, yields distinct confinement profiles tailored to specific qubit requirements. The FNO can produce both vertically and horizontally elongated double-dot confinement geometries from the same initial conditions.

Limitations of Post-Fabrication Tuning Motivate Co-Design

Existing methods of refining quantum dot architectures through repeated fabrication and testing encounter inherent limitations, as they are constrained by the initial lithographic layout of gate electrodes. Even with optimal voltage tuning, certain qubit properties, such as enhanced Rabi frequencies, may remain inaccessible if the fundamental geometry does not support the desired confinement landscape. This realization prompted a shift towards a co-design framework that simultaneously optimizes both the shape of the gate electrodes and the voltages applied to them, expanding the range of achievable device characteristics.

While data-driven methods have previously been applied to optimize fabrication processes and machine-learning techniques have informed semiconductor growth, pre-fabrication optimization of quantum dot gate electrode layouts has remained largely unexplored. Traditional numerical methods present a significant bottleneck, with a single simulation on a 343×399 pixel grid requiring approximately 24 seconds, a computational cost that escalates rapidly with larger spatial domains.

This allows for rapid evaluation and gradient-based optimization, a process previously hampered by the non-differentiable nature of conventional simulators. These results demonstrate a level of control over distinct quantum dot confinement landscapes achieved through the joint optimization of gate electrode layouts and operating voltages, representing a move towards incorporating design optimization into the pre-fabrication stage.

“Rather than relying on voltage tuning to explore the operating regimes supported by a fixed gate architecture, the gate-electrode geometry itself is optimised to produce a prescribed confinement landscape,” the researchers state. This approach fundamentally alters the optimization process, moving beyond simply tuning existing structures to proactively designing them for specific functionalities.

Neural Operators Map Device Design to Electrostatic Potential

The team used a semiclassical Thomas-Fermi electrostatic simulator to provide reference data for training the FNO, enabling it to predict charge distributions with high fidelity. Relative to the CPU-based physics simulator, the FNO achieves a 17,000-fold speed-up on GPU for a single design, with further performance gains enabled by batched inference.

Framework Co-Optimizes Gate Voltages and Layout Geometry

This precision stems from the use of a Fourier Neural Operator (FNO) trained on data generated by a semiclassical Thomas-Fermi electrostatic simulator, effectively replacing intensive simulations with a differentiable surrogate model. The FNO’s input combines gate electrode geometry and applied voltages into a single spatial field, allowing for the simultaneous optimisation of both design elements. The optimisation process defines an inverse-design objective, quantified by a loss function that balances agreement with target confinement profiles and adherence to fabrication constraints.

This loss function incorporates four terms, weighting deviations in charge density, external and internal fabrication limits and the desired quantum dot geometry. Gradients of this loss are then backpropagated to continuously adjust both the geometry and voltage parameters, enabling a co-optimised design. The ability to engineer distinct confinement configurations demonstrates control over quantum-dot shape and position, providing a route towards designing devices with distinct qubit-relevant operating properties prior to fabrication.

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