Iceberg Quantum reports factoring 2048-bit RSA integers, a benchmark long believed to demand millions of qubits, could potentially be achieved with fewer than one hundred thousand using its new “Pinnacle” architecture. The company validates its core thesis that quantum architectures can be an order of magnitude better, requiring ten times fewer physical qubits than current approaches. Alongside the release of Pinnacle, the Sydney-based firm is expanding with a new office in Berlin and a $6 million seed round led by LocalGlobe, Blackbird, and DCVC.
Pinnacle Architecture Achieves 10x Physical Qubit Reduction
This reduction in qubit count stems from the architecture’s use of quantum low-density parity-check (qLDPC) error correcting codes, offering a ten-fold improvement in overhead compared to surface codes currently favored by many developers. The company validated Pinnacle by compiling the RSA factoring benchmark, a standard test for quantum cryptographic capability, and achieving the result with significantly reduced hardware demands, Iceberg Quantum says.
These collaborations allow for validation of the qLDPC architecture across diverse quantum computing modalities, including photonic, silicon spin, and trapped-ion systems. Confirmation of Pinnacle’s logical advantage on spin-qubit hardware, reported on September 14, further supports the architecture’s viability.
The company, a University of Sydney spinout, positions itself as an architecture provider aiming to accelerate the transition to fault-tolerant quantum computing. The company states that the funding will facilitate scaling research and design partnerships with leading hardware providers.
Founders Sam Smith, Larry Cohen, and Felix Thomsen assembled a team focused on fault tolerance, drawing on experts who have contributed significantly to advancements in the field, and believe that fault tolerance, once a distant goal, is now becoming achievable. They explain that their goal is to accelerate the transition to, and ultimately power, the fault-tolerant era of quantum computing by defining how this hardware computes.
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