QuEra Computing has open-sourced Tsim, a GPU-accelerated simulator designed to address a critical limitation in quantum error correction research. The new tool allows researchers to simulate complex quantum circuits, including those utilizing non-Clifford gates, essential for achieving a computational speedup over classical computers, at a scale previously unattainable. Unlike existing simulators, Tsim supports circuits with over 80 physical qubits and can generate millions of samples in parallel, completing a single 85-qubit circuit simulation in approximately 600 nanoseconds on an NVIDIA GH200. “We built Tsim for our own research and are releasing it because the entire quantum error correction community benefits when researchers can simulate realistic fault-tolerant circuits quickly and at scale,” said Shengtao Wang, VP of Algorithms and Applications at QuEra Computing. This release aims to accelerate the development of reliable, fault-tolerant quantum computers by providing a powerful tool for design, testing, and optimization.
\nT-Gate Simulation Enables Scalable Quantum Error Correction
\nUnlike the widely adopted STIM simulator, which only handles Clifford gates, Tsim supports non-Clifford gates, specifically T-gates, essential for achieving quantum speedup over classical computers. This release follows a productive 2025 for the company, which saw four papers published in Nature detailing advances in multi-atom array operation and fault-tolerant architectures. Tsim’s compatibility with the STIM circuit format and integration into QuEra’s Bloqade ecosystem streamline workflows for researchers and developers, allowing for easier extension of existing pipelines. The tool’s applications extend beyond research, offering a platform for training, education, and the design of more reliable quantum computers by simulating error-prone physical qubits. QuEra will host a webinar on Tsim April 28 at 1:00 PM EST, and the simulator is available on GitHub.
\nGPU-Accelerated Tsim Achieves 600ns Shots for 85 Qubits
\nThe pursuit of practical quantum computers currently hinges on overcoming the inherent instability of qubits; researchers are increasingly focused on quantum error correction as the most viable path toward fault-tolerant machines, but progress demands increasingly sophisticated simulation tools. The widely used STIM simulator, for example, is limited to Clifford gates, creating a bottleneck for realistic simulations. The company reports achieving approximately 600 nanoseconds per shot for an 85-qubit circuit running on an NVIDIA GH200, a significant improvement over existing capabilities. This enhanced simulation speed allows researchers to design more reliable quantum computers by testing error-correction strategies and architectures, and to validate algorithms before committing to expensive and limited hardware experiments.
\n\n\nBy open-sourcing Tsim, QuEra has extended its fault-tolerant momentum from hardware into software, giving the research community tools to design and validate the protocols that those machines will run.
Shengtao Wang, VP of Algorithms and Applications at QuEra Computing
QuEra’s 2025 Advances Support Fault Tolerance
\nQuEra Computing is addressing a critical bottleneck in the development of practical quantum computers: the simulation of circuits necessary for quantum error correction. This release is not an isolated event; it follows a particularly productive 2025 for QuEra, marked by the publication of four papers in Nature detailing significant advances in fault-tolerant quantum computing. These papers, developed in collaboration with Harvard and MIT, showcased continuous operation of large atom arrays and integrated architectures with up to 96 logical qubits. The need for robust simulation tools stems from the inherent fragility of qubits; error correction is paramount, but designing and testing these correction protocols requires simulating circuits across millions of iterations. By providing a platform for faster, more realistic simulations, QuEra aims to accelerate the entire quantum research pipeline, from algorithm design and testing to training the next generation of quantum scientists and engineers, and ultimately, to extend their fault-tolerant development from hardware into software.
\n\n\nWe built Tsim for our own research and are releasing it because the entire QEC community benefits when researchers can simulate realistic fault-tolerant circuits quickly and at scale.
Shengtao Wang, VP of Algorithms and Applications at QuEra Computing
