SEALSQ’s quantum-safe QS7001 chip passes security test

SEALSQ Corp reports that its QS7001 secure element has successfully completed the technical evaluation phase for Common Criteria EAL5+ certification. SERMA Safety & Security, licensed by the French National Cybersecurity Agency (ANSSI), performed all physical and functional security tests on the QS7001 V1, resulting in a passing result. Achieving this relatively rare assurance level, augmented with ALC_DVS. 2 and AVA_VAN. 5, positions SEALSQ to deploy multiple quantum-resistant products, including VaultIC409 and QVault TPM, all built on the validated QS7001 hardware platform.

“Passing every physical and functional test at the EAL5+ level is the result that matters most to our customers,” said Carlos Moreira, Founder, Chairman and CEO of SEALSQ. “Security features are not certified security.”

QS7001 V1 Achieves EAL5+ Common Criteria Technical Evaluation

The laboratory’s final report confirms the successful completion of all physical and functional security tests, a process that included rigorous assessments of resistance to both physical and side-channel attacks. This evaluation focused on the chip’s ability to withstand fault injection and maintain secure operation of its security functions, building on prior validation of its entropy source by the National Institute of Standards and Technology in May 2026.

The QS7001 V1 achieved Common Criteria EAL5+ assurance, augmented with ALC_DVS. 2 and AVA_VAN. 5, a relatively rare and demanding standard within the security certification landscape. This level of evaluation requires extensive testing and documentation, demonstrating a high degree of confidence in the chip’s ability to protect against sophisticated attacks.

The technical evaluation followed completion of fault-injection and side-channel testing in March 2026, and precedes final site audits and administrative processes required for formal certificate issuance by ANSSI. The company anticipates these remaining steps will be completed in 2027. The successful evaluation of QS7001 directly benefits the product roadmap, specifically the VaultIC409 secure element and the QVault TPM.

Both products are built upon the QS7001 hardware platform and will share the same EAL5+ certification, providing a validated security foundation for multiple quantum-resistant offerings. The company’s ability to deliver a hardware Root of Trust incorporating standardized post-quantum algorithms, like ML-KEM and ML-DSA, positions it to address emerging security threats.

For customers, the completed technical evaluation provides a level of assurance that allows them to confidently move forward with their own product designs and launch plans, SEALSQ says. With the technical phase of the evaluation complete, manufacturers can build on QS7001, VaultIC409 and QVault TPM with confidence, while the final audits and the formal certificate are completed.

The remaining steps in the certification process involve audits of the Meyreuil, France site, including its clean room, and renewal audits of two partner sites, scheduled for January 2027, according to SEALSQ. The company expects to begin the V2 full post-quantum evaluation in January 2027, further solidifying its commitment to providing robust and future-proof security solutions.

Passing every physical and functional test at the EAL5+ level is the result that matters most to our customers.

Carlos Moreira, Founder, Chairman and CEO of SEALSQ
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Ivy Delaney

Ivy Delaney has been working with neural networks and machine learning since the mid-nineties, back when a couple of hidden layers and a long afternoon of training counted as ambitious. She has watched the field go from academic curiosity to the thing quietly running underneath everything, and she brings that long view to quantum computing. For Quantum Zeitgeist she covers the ground where the two fields meet. That means quantum machine learning and the variational algorithms it leans on, and it also means the less glamorous but more interesting story of classical machine learning already doing real work inside quantum machines, decoding error-correcting codes, calibrating noisy hardware and learning the error models that simulators depend on. She writes about the hardware those algorithms have to run on too, and about the post-quantum cryptography scramble that the same hardware has set off. Her stories typically start with the paper, whether that is peer-reviewed work, conference proceedings or an arXiv preprint, with the source linked so you can hold a claim up against the research it came from. She is unimpressed by benchmarks that will not say what they beat, and by demonstrations that only work in the press release.

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