A new three-dimensional (3D) integrated quantum processor featuring vertically stacked qubit chips connected via a novel multilayer flip-chip bonding technique has been created by Xudong Liao and colleagues at Nanjing University, in collaboration with Tencent Quantum Laboratory. The architecture uses both planar and vertical tunable couplers to achieve high-fidelity qubit control, demonstrating single-qubit gate fidelities of 99.87% and controlled-Z gate fidelities of 97.5% for both within-chip and between-chip operations. Successful demonstration of high-fidelity Bell-state preparation and a four-qubit W state confirms the potential of vertical coupling as a viable route towards building scalable quantum computers capable of implementing advanced quantum error correction.
High-fidelity single and two-qubit gates achieved using a three-dimensional architecture
Single-qubit gate fidelities reached 99.87%, a substantial improvement over previous planar architectures that struggled with crosstalk and signal loss as qubit numbers increased. This level of accuracy, confirmed by randomised benchmarking, surpasses the threshold required for implementing complex quantum error correction protocols. Maintaining coherence and control at such high fidelities across multiple qubits previously proved exceptionally difficult.
The new three-dimensional design utilises vertical tunable couplers, microscopic switches controlling qubit connections, to enable entanglement between chips and bypass limitations of traditional two-dimensional layouts. The stacked architecture allows for denser wiring and minimizes signal degradation, paving the way for scalable quantum processors with improved performance and reduced error rates. High-fidelity two-qubit controlled-Z gates were achieved, averaging 97.5% for both connections within and between chips, validating the vertical coupling scheme.
Quantum state tomography confirmed Bell-state preparation achieved 97.0% fidelity, verifying the quality of entanglement across the chip boundaries. A four-qubit W state was coherently generated in approximately 68 nanoseconds, demonstrating the architecture’s ability to manage multiqubit entanglement spanning multiple physical chips. Current results demonstrate entanglement across only two chips, and scaling to the thousands of qubits needed for practical quantum computation remains a significant engineering challenge. Tunable couplers are incorporated into the design, allowing independent control of qubit connections and enabling precise gate operations. These couplers operate on a qubit-coupler-qubit scheme, suppressing unwanted interactions when qubits are not actively entangled; however, a comparison to alternative modular quantum computing methods is not included, nor are the limitations of the current fabrication process beyond the two-chip system discussed.
Vertical integration of superconducting qubits and scalability limitations
A three-dimensional (3D) superconducting quantum processor has been successfully fabricated, vertically stacking two qubit chips and connecting them using flip-chip bonding. This technique interconnects chips face-down. The arrangement utilises planar couplers within each chip and new vertical couplers on a carrier chip to enable entanglement between qubits on different layers. Increased complexity and potential reductions in fidelity present unresolved challenges when scaling to a larger system.
Distributing functional layers across both sides of a carrier chip achieves 3D integration, increasing integration density and potentially alleviating the crosstalk issues inherent in densely packed 2D designs. Randomised benchmarking confirmed comparable performance and minimal crosstalk between qubits, regardless of coupling method. The system’s properties align with requirements for quantum error correction codes, although details of how this compatibility translates into demonstrable error correction are not provided.
Vertical integration of superconducting qubits via flip-chip bonding enhances quantum control
Researchers of Technology and QuTech have created a three-dimensional (3D) superconducting quantum processor, stacking two qubit chips vertically and connecting them with flip-chip bonding, a technique for mounting chips face-down onto a carrier. This new architecture utilises vertical tunable couplers, enabling entanglement between chips and achieving high-fidelity quantum operations. Earlier work explored distributed modular quantum computing, linking separate processors via coaxial cables for remote state transfer, but this suffered from interface losses and space requirements within dilution refrigerators.
Planar couplers were employed for connections within each chip, while vertical couplers were embedded within the carrier chip to enable interchip communication. The system successfully prepared a four-qubit W state in approximately 68 nanoseconds, confirming the ability to distribute entanglement between chips. The authors suggest this vertical coupling pathway offers compatibility with advanced quantum error-correcting codes, essential for building fault-tolerant quantum computers.
This work builds upon earlier integration techniques using flip-chip bonding and through-silicon vias, proposing an alternative route distributing functional layers on both sides of a single chip to enhance integration density. This demonstration of a three-dimensional superconducting quantum processor establishes vertical chip connections as a viable route to increased qubit density. Achieving single-qubit gate fidelities of 99.87% confirms the potential for high-performance quantum operations within and between these stacked layers. This advance opens questions regarding the optimal materials and fabrication techniques needed to scale this design to the thousands of qubits required for practical, fault-tolerant quantum computation. Simultaneously suppressing crosstalk and scaling qubit numbers remains an open problem, requiring further investigation.
The researchers successfully created a three-dimensional superconducting quantum processor by vertically stacking two qubit chips and connecting them using flip-chip bonding. This architecture achieves high-fidelity single-qubit gates at 99.87% and controlled-Z gates at 97.5%, demonstrating effective entanglement distribution between chips. The ability to generate a four-qubit W state confirms the system’s capacity for interchip entanglement. This vertical coupling method presents a potential pathway towards building scalable quantum processors compatible with quantum error-correcting codes, which are vital for reliable computation.
👉 More information
🗞 Breaking the scalability barrier via a vertical tunable coupler in 3D integrated transmon system
🧠 ArXiv: https://arxiv.org/abs/2605.11488
