FPGA Controller Links Quandela QPU to NVIDIA GPU Host

Quandela has experimentally validated a low-latency integration between its photonic quantum processor and NVIDIA AI infrastructure, demonstrating a key step toward embedding quantum processing directly within high-performance computing environments. Results presented at ISC showcase how a Quandela photonic QPU can connect with an NVIDIA GPU host via NVIDIA NVQLink, a hardware and software architecture designed for real-time communication. This validation moves beyond typical remote quantum access, enabling collocated quantum acceleration inside HPC infrastructure where quantum processors function more like traditional accelerators. “This is not just a demonstration of connectivity,” said Jean Senellart, Chief Technology & Product Officer at Quandela. “This validation confirms a technical path toward integrating photonic QPUs into the HPC accelerator stack.”

Quandela Validates NVQLink for Photonic QPU Integration

Crucially, the validation involved measuring communication latency between the GPU infrastructure and an FPGA-based Quantum System Controller, confirming a viable path for photonic QPUs to directly participate in GPU-driven workloads. Initial target applications focus on photonic Quantum Machine Learning, including quantum reservoir computing and hybrid neural networks, where the ability to rapidly reuse photonic circuit configurations during inference is particularly advantageous. According to Sam Stanwyck, Director of Quantum Product at NVIDIA, “Tightly integrating quantum systems with accelerated computing is proving impactful for quantum research.” Quandela’s MerLin framework provides the software environment for designing and benchmarking these hybrid workflows, building upon the company’s MosaiQ platform and its FPGA-based control capabilities aligned with the NVQLink standard, potentially enabling on-premise QPU installations for HPC centers and advanced research organizations.

Collocated Architecture Enables Low-Latency Hybrid Computing

The pursuit of practical quantum computing is rapidly shifting focus from remote access to direct integration with existing high-performance computing infrastructure. While cloud-based quantum processing remains valuable for experimentation, latency often hinders applications demanding real-time responses within AI and HPC pipelines, as most quantum processors are currently accessed through cloud APIs, job queues and orchestration layers. Quandela has now demonstrated a pathway to overcome this limitation, experimentally validating a low-latency connection between a photonic quantum processing unit and NVIDIA AI infrastructure. Central to this advancement is NVIDIA NVQLink, a hardware and software architecture specifically designed for real-time communication between GPU supercomputing and quantum system controllers. This collocated architecture, combining NVIDIA accelerated computing and networking with the QPU, allows existing HPC schedulers to manage resource allocation while minimizing delays in the quantum-classical workflow.

Photonic QML Workloads Benefit from Fast Sampling

Quandela is concentrating development efforts on optimizing photonic quantum processing units for demanding quantum machine learning workloads, specifically targeting the reduction of system-level latency. The company’s recent validation of low-latency communication between its photonic QPU and NVIDIA GPU infrastructure, facilitated by NVIDIA NVQLink, is designed to address a critical bottleneck in current hybrid quantum-classical computing paradigms. Currently, many quantum processors rely on cloud-based access, introducing delays that hinder real-time applications within artificial intelligence and high-performance computing pipelines. This shift toward collocated quantum acceleration inside HPC infrastructure is enabled by an FPGA-based Quantum System Controller, which Quandela has rigorously tested to measure communication speeds between the GPU and QPU. The speed advantage stems from the ability to reuse optical configurations across multiple inference calls, requiring only lightweight updates before measurement; combined with fast photonic sampling, this minimizes overall latency.