Researchers at the Beijing Key Laboratory of Fault-Tolerant Quantum Computing and the Hefei National Laboratory have achieved a qubit reset error rate of 0.0028, a substantial reduction that brings scalable quantum computing closer to reality. The team demonstrated this improvement using a compact on-chip dissipator operating below the qubit frequency, a counterintuitive approach that lowers the effective temperature of the qubit from 49 mK to 35 mK. This new reset protocol is robust to parameter variations, simplifying the calibration process for large-scale superconducting quantum processors.
Compact Dissipator Design for Superconducting Qubit Reset
A process error of 0.0028 has been achieved in resetting a superconducting qubit, a substantial reduction enabled by a newly designed on-chip dissipator operating below the qubit’s resonant frequency. This level of fidelity represents a critical step toward building larger, more reliable quantum processors where rapid and accurate qubit re-initialization is paramount. The device minimizes disruption to qubit coherence while efficiently driving it toward its ground state.
The dissipator itself consists of two transmon dissipation modes coupled with a thin-film resistor, creating a compact circuit that requires no additional control lines for operation. This simplicity is a key advantage, as scaling up quantum systems demands minimizing the complexity of control infrastructure. By reducing the effective temperature of the transmon qubit from 49 millikelvin to 35 millikelvin, the design demonstrably improves the qubit’s initial state preparation.
This temperature reduction was achieved through repeated reset cycles, a technique that further enhances the protocol’s performance and stability. The new reset protocol’s robustness to variations in pulse parameters also simplifies the calibration process, a significant hurdle in building large-scale quantum computers. Previous reset methods often required precise tuning, consuming valuable time and resources. The researchers report that the error rate remains below 0.01 for a sufficient number of reset cycles, even with parameter fluctuations.
Quantum process tomography was employed to rigorously benchmark the reset process, confirming the achieved fidelity. This technique allows for a comprehensive characterization of the qubit’s state after the reset, providing a detailed assessment of its accuracy.
The results demonstrate that the implemented protocol achieves a process fidelity of 0.9972, indicating a high degree of confidence in its ability to reliably prepare qubits for subsequent computations. The dissipator’s design was systematically characterized through spectroscopic measurements, confirming the coupling strengths of the dissipation modes aligned with design specifications. These institutions, both based in China, are increasingly recognized for their contributions to quantum technology.
The team’s work highlights a growing international focus on quantum computing beyond traditional hubs in North America and Europe. The researchers state in their publication. This compact colder resistive dissipator offers a practical and calibration-friendly reset solution for future large-scale superconducting quantum processors, addressing a critical bottleneck in the development of fault-tolerant quantum computation.
Impact of On-Chip Cooler on Qubit Temperature
The effective temperature of a transmon qubit can be lowered to 35 millikelvin using a newly developed on-chip cooler, a reduction from the initial 49 millikelvin achieved without the device. This temperature decrease is not merely a refinement of existing cooling techniques. It stems from a design that actively suppresses thermal excitation within the qubit itself, a key step towards maintaining quantum coherence. This approach diverges from conventional methods that often rely on higher-frequency resonators as dissipators, which can be complex and slow in their excitation transfer process.
The team’s design, however, focuses on a lower-frequency dissipation channel, demonstrating that a carefully engineered on-chip component is an effective thermal sink. Spectroscopic measurements systematically characterized the dissipator, confirming the observed coupling strengths align with the intended design parameters and validating the functionality of the two dissipation modes.
This precise control over the dissipation process is key to achieving the observed temperature reduction and maintaining qubit stability. The success of this reset scheme implies a lower thermal population within the dissipator itself, particularly when its frequency is lower than that of the qubit. This counterintuitive result suggests that the dissipator can be held at a significantly lower temperature than the qubit, effectively drawing heat away and minimizing thermal noise.
Single-shot readout histograms demonstrate a clear suppression of initialization errors, with a reduced separation between the distributions of the |0⟩ and |1⟩ states when the reset cycle is applied. The data, collected over 1024 shots, shows a consistent reduction in the effective qubit temperature, further confirming the efficacy of the on-chip cooler.
Achieving 0.0028 Reset Error with Quantum Tomography
Quantum process tomography confirmed a reset error of 0.0028, a figure representing a substantial reduction in errors during qubit re-initialization and a critical advancement for scaling superconducting quantum processors. This level of fidelity, achieved through a novel on-chip dissipator, addresses a growing challenge in quantum computing where the speed and accuracy of resetting qubits increasingly lags behind improvements in gate performance. The demonstrated error rate is measured using a generalized expression that maps fidelity ranges while preserving results for unitary operations, providing a rigorous benchmark for the non-unitary reset process.
The architecture of this new reset mechanism centers on a compact dissipator constructed from two transmon dissipation modes and a thin-film resistor, operating at a frequency below that of the qubit itself. This counterintuitive approach distinguishes it from many existing reset methods, which typically rely on higher frequency dissipation.
Further analysis revealed the robustness of this reset protocol to variations in key operating parameters. Systematic benchmarking demonstrated that even with deliberate changes to the iSWAP amplitude, exchange duration and dissipation waiting time, the protocol maintained a low reset error below one percent. This parametric robustness is a significant advantage, as it reduces the complexity and time required for calibration, a major hurdle in building and maintaining large-scale quantum systems.
The team’s work highlights the importance of thermal management in scaling quantum processors, demonstrating that careful control of qubit temperature is essential for achieving high-fidelity operations. Data obtained through quantum process tomography resulted in process matrices for both the experimental reset circuit and an ideal reset process, allowing for direct comparison and validation of the technique. The extracted process fidelity reached 0.9972, corresponding to the 0.0028 error rate.
This fidelity was maintained across a range of dissipation cycles, confirming the reliability of the method. Examining decoherence and single-qubit gate fidelity alongside the reset process revealed minimal impact on qubit T1, indicating that the reset mechanism does not significantly degrade other essential qubit characteristics.
The researchers also explored the relationship between the dissipator temperature and qubit temperature, estimating the dissipator temperature at approximately 30 millikelvin based on the assumption that both systems reach thermal equilibrium after multiple dissipation cycles. The implementation of this scheme emphasises the critical role of thermal management in the development of large-scale quantum processors. The demonstrated error rate represents a step towards achieving the levels of fidelity required for practical quantum computation.
Reset Protocol Robustness to Calibration Deviations
A reset error of 0.0028 has been achieved in superconducting qubit initialization using a newly developed on-chip dissipator, a result that significantly eases the demands on calibration for larger quantum processors. The robustness of this reset protocol extends beyond mere speed and efficiency; it maintains a low error rate even when calibration parameters are deliberately varied. The researchers demonstrated this resilience by testing the protocol with imperfect iSWAP exchanges, observing that increasing the number of reset cycles consistently yielded low and stable error rates.
The design of the dissipator itself underwent thorough spectroscopic characterization, confirming that the coupling strengths between its components aligned with intended values. This careful characterization, combined with the implementation of a multi-round reset cycle, allows for reliable performance despite imperfections in the system.
Further analysis revealed that the number of reset cycles, denoted as ‘n’, is important in achieving low error rates. The study found that for sufficiently large values of ‘n’, the reset error remains consistently low, even in the presence of calibration imperfections. This finding is particularly significant because it demonstrates the protocol’s ability to compensate for real-world variations in system parameters. The researchers employed a bootstrapping method to analyze sampling errors, further validating the accuracy and reliability of their results.
Dissipator Architecture for Scalable Quantum Processors
A reset process error of 0.0028, achieved through a novel dissipator architecture, demonstrates a significant reduction in qubit initialization faults, bringing scalable superconducting quantum computing closer to realization. This reduction in effective temperature is critical, as it minimizes thermal excitations that can lead to errors during quantum computations. This robustness is a key advantage, as it reduces the demands on precise control and simplifies the scaling of quantum processors.
The dissipator’s compact design and operation below the qubit frequency suggest a potentially more efficient and less disruptive method for qubit control. The authors state, emphasizing the importance of thorough benchmarking in validating quantum control techniques. The combination of a compact, efficient dissipator and a robust control protocol offers a promising pathway towards building larger, more reliable superconducting quantum processors.
👉 More information
🗞 Resetting a Superconducting Qubit with a Compact Colder Resistive Dissipator below the Qubit Frequency
✍️ Jiajia Tian et al. (Beijing Key Laboratory of Fault-Tolerant Quantum Computing, Beijing Academy of Quantum Information Sciences, Beijing 100193, China)
🧠 ArXiv: https://arxiv.org/html/2611.06216v1




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