IQM Quantum Computers has achieved over 99.9% fidelity across single-qubit gates, two-qubit gates, and qubit readout within a single superconducting device, a feat previously hindered by the trade-offs between optimizing individual quantum operations. Researchers at the company’s locations in Espoo, Finland and Munich, Germany demonstrated that careful tuning of qubit-coupler coupling strengths, combined with a new calibration protocol called phased-averaged leakage error amplification (PALEA), enables consistently high performance across all essential functions. “Achieving such performance simultaneously for every type of operation represents a crucial step toward making large-scale quantum computation practical,” the team writes. This advance signals a viable path toward scaling up superconducting quantum processors while maintaining the accuracy needed for complex algorithms.
High-Fidelity Single & Two-Qubit Gate Performance
A single superconducting quantum device has demonstrably surpassed 99.9% fidelity. Researchers at IQM Quantum Computers, with facilities in Espoo, Finland and Munich, Germany, detailed this advancement, suggesting a significant step toward practical, scalable quantum computation. This isn’t merely incremental improvement; it’s a holistic performance boost that addresses a critical bottleneck in quantum processor development. The team, led by Fabian Marxer and Jakub Mrożek, co-first authors, achieved this level of precision through meticulous tuning of qubit-coupler coupling strengths within a superconducting circuit featuring two transmon qubits connected by a tunable coupler.
This careful calibration allows for high-fidelity single- and two-qubit gates without sacrificing the accuracy of qubit readout, a delicate balance often disrupted by attempts to maximize individual components. The researchers note that device parameters that enhance one operation often degrade the others, making simultaneous optimization challenging. They detail how the protocol minimizes energy loss during two-qubit operations, a major obstacle for quantum error correction. These efforts resulted in a 40 hour-averaged CZ gate fidelity of %, alongside simultaneous single-qubit gate fidelities of %, and readout fidelities over %. “Our results show that it is now possible to build superconducting qubit processors where errors are reduced to levels needed for scalable fault-tolerant quantum computing,” they conclude, suggesting a future where quantum algorithms can run with significantly reduced error rates and increased reliability.
Tunable Qubit-Coupler Coupling Optimization
While individual gate fidelities have steadily increased, maintaining this performance across all necessary operations, single-qubit rotations, two-qubit entanglement, and qubit readout, has proven remarkably difficult. Researchers, including co-first authors Fabian Marxer and Jakub Mrożek, have successfully demonstrated a system where all three critical operations surpass the 99.9% fidelity milestone. This wasn’t achieved through isolated improvements, but through a holistic approach to device design and calibration. The team focused on carefully tuning the interaction between qubits via a tunable coupler, a component that mediates entanglement. The resulting device achieves a 40 hour-averaged CZ gate fidelity of %, alongside simultaneous single-qubit gate fidelities of %, and readout fidelities over %. Central to this achievement is a novel calibration protocol termed “phased-averaged leakage error amplification,” or PALEA. This technique efficiently suppresses coherent gate errors and minimizes unwanted leakage to non-computational states during two-qubit operations, a persistent source of error in quantum systems.
As the researchers explain, the combination of PALEA and careful tuning of qubit-coupler coupling strengths unlocked this level of performance. This combination represents a crucial step toward building quantum processors capable of running complex algorithms without being overwhelmed by accumulated errors. The methods developed for both improving fidelities and diagnosing errors can be readily applied to a wide range of quantum computing platforms, suggesting a broadly impactful advancement in the field.
PALEA Calibration for Controlled-Z Gates
The team recognized that optimizing device parameters to enhance one operation often inadvertently degrades others, creating a complex interplay that demands holistic optimization. Their approach centers on carefully tuning the coupling strengths between qubits and a tunable coupler within a superconducting circuit. This is achieved through a sophisticated method of error amplification, allowing for more effective calibration and minimization of these detrimental effects. By combining PALEA with the optimized qubit-coupler coupling strengths, IQM’s device demonstrated a 40 hour-averaged CZ gate fidelity of %, simultaneous single-qubit gate fidelities of %, and readout fidelities over %. The methods developed, they note, are broadly applicable and extend beyond the specific architecture studied, offering a versatile toolkit for improving performance across diverse quantum computing platforms.
Achieving >99.9% Fidelity Across Operations
The pursuit of practical quantum computation received a significant boost as researchers demonstrated a superconducting quantum device achieving greater than 99.9% fidelity. This level of performance, exceeding the critical threshold for viable quantum algorithms, moves the field closer to realizing scalable and reliable quantum processors, and represents a departure from previous efforts focused on optimizing individual operations at the expense of others. This precise calibration maximized the combined performance of both single and two-qubit gates while simultaneously preserving high-fidelity readout, a feat previously difficult to attain. The team introduced a novel calibration protocol, dubbed phased-averaged leakage error amplification (PALEA), designed to efficiently suppress coherent gate errors and leakage to non-computational states. The results detailed a 40 hour-averaged controlled-Z (CZ) gate fidelity of %, simultaneous single-qubit gate fidelities of %, and readout fidelities over % in a single device.
This holistic improvement isn’t simply incremental; it’s a comprehensive performance boost that addresses a core limitation of current quantum systems. The team’s success indicates that building superconducting qubit processors with error rates sufficiently low for scalable, fault-tolerant quantum computing is no longer a distant prospect, but a tangible possibility.
The pursuit of practical quantum computation often focuses on scaling up qubit numbers, but recent advances at IQM Quantum Computers demonstrate that consistently high performance across all fundamental operations is equally crucial, and surprisingly difficult to achieve. Achieving over 99.9% fidelity for each of these core operations concurrently required precise adjustment to maximize performance across all operations without sacrificing readout fidelity, a common trade-off in previous designs.
