Duan and Colleagues Design Routing Codes for Simplified Quantum Hardware Realization

A new family of quantum low-density parity-check (qLDPC) codes, termed routing codes, addresses key hardware limitations hindering the development of large-scale fault-tolerant quantum computing. Jiaxuan Zhang of Hefei Co, in collaboration with University of Science and Technology in china, and colleagues show that these codes achieve encoding rates comparable to existing bivariate bicycle (BB) codes, but with sharply improved physical feasibility through reduced qubit connectivity and shorter, parallel non-local couplings. The new approach fundamentally simplifies hardware implementation for platforms like superconductors and neutral atoms by eliminating wiring crossings and streamlining atom movement scheduling. Circuit-level simulations reveal that these weight-7 routing codes reduce physical qubit overhead by approximately a factor of 8, compared to surface codes with equivalent logical error rates, establishing them as a promising, hardware-centric qLDPC family.

Weight-7 routing codes substantially lower physical qubit requirements for fault-tolerant quantum

Weight-7 routing codes reduce physical qubit overhead by approximately a factor of 8, compared to surface codes achieving the same logical error rate. Existing surface codes demanded an impractical number of physical qubits to correct errors, limiting computational complexity, and this breakthrough crosses a key threshold previously hindering the scalability of quantum computers. The University of Science and Technology of China and Origin Quantum Computing team achieved this reduction by designing a new family of quantum low-density parity-check (qLDPC) codes, termed routing codes, which simplify hardware requirements. Quantum error correction is crucial because qubits are inherently susceptible to decoherence and gate errors, which introduce noise into quantum computations. Without error correction, these errors rapidly accumulate, rendering computations unreliable. qLDPC codes offer a promising pathway to fault-tolerant quantum computing by distributing quantum information across multiple physical qubits, allowing for the detection and correction of errors without destroying the encoded quantum information.

A comparable encoding rate to bivariate bicycle (BB) codes characterises these new codes, representing a significant step towards more efficient quantum error correction. Encoding rate, in this context, refers to the ratio of logical qubits (the qubits representing the actual information) to physical qubits (the qubits used to encode and protect the information). A higher encoding rate implies greater efficiency in utilising physical resources. They require only 5 connections per qubit, a marked improvement over the degree-6 connectivity of standard BB codes. This reduction in connectivity directly translates to a simpler and more manageable hardware architecture. Fewer connections reduce the complexity of wiring in superconducting circuits and the difficulty of precisely controlling interactions between neutral atoms. Circuit-level simulations confirm these weight-7 routing codes reduce physical qubit overhead by approximately a factor of 8 when compared to surface codes achieving the same logical error rate. The ‘weight’ of a code refers to the number of qubits involved in each check operation; a lower weight generally implies simpler hardware requirements. Moreover, the team achieved mutually parallel non-local couplings, eliminating wiring crossings in superconducting architectures and simplifying atom movement in neutral-atom arrays, unlike the crossing nature of BB code coupling vectors which complicates hardware layouts. Prioritising ease of implementation alongside theoretical optimisation represents an important hardware-centric approach for overcoming current engineering limitations and accelerating progress in the field. The parallel nature of these couplings is particularly significant, as it allows for simultaneous execution of multiple operations, potentially speeding up the error correction process.

Reduced qubit overheads pave the way for scalable quantum processors

The researchers of Science and Technology of China and Origin Quantum Computing have unveiled routing codes, a new approach to quantum error correction designed with practical hardware in mind. Simulations demonstrate a substantial reduction in the physical qubits needed for stable computation, although these results are currently limited to circuit-level modelling. Circuit-level simulations model the behaviour of quantum circuits using classical computers, allowing researchers to evaluate the performance of different error correction codes before implementing them on actual quantum hardware. While these simulations provide valuable insights, they do not fully capture all the complexities of real quantum systems, such as noise and imperfections in qubit control. The abstract details additional, higher-performing codes, weight-8 and weight-6 variants, but explicitly states their circuit-level performance remains unevaluated. These variants, while potentially offering improved theoretical parameters, require further investigation to determine their practical feasibility. Despite the fact that higher-performing weight-8 and weight-6 variants have yet to undergo circuit-level simulations, this development remains important. The potential for these codes to reduce the physical qubit count is particularly relevant given the current limitations in building large-scale quantum computers. Current quantum processors are limited by the number of qubits they can reliably control and maintain coherence in. Reducing the number of physical qubits required for a given level of error correction would significantly reduce the resources needed to build a fault-tolerant quantum computer.

These codes simplify the physical arrangement of qubits by reducing the need for extensive connections and enabling parallel data transfer, a key advantage for both superconducting and neutral atom quantum computers. Superconducting qubits are fabricated on planar chips, where connectivity is limited by the physical layout of the circuit. Neutral atom qubits, on the other hand, are trapped and controlled using lasers or magnetic fields, requiring precise manipulation of individual atoms. Both platforms benefit from reduced connectivity and simplified control schemes. This design choice addresses a significant hurdle in scaling up quantum processors, as complex wiring and precise atom manipulation often limit the size and durability of quantum systems. The ability to implement error correction with fewer physical qubits and simpler hardware connections is a crucial step towards building practical, large-scale quantum computers capable of solving complex problems beyond the reach of classical computers. Further research will focus on validating these simulation results on actual quantum hardware and exploring the potential of the weight-8 and weight-6 routing codes.

The researchers developed a new family of quantum low-density parity-check (qLDPC) codes, termed routing codes, which offer comparable encoding rates to existing codes while simplifying hardware requirements. These codes reduce qubit connectivity and the length of non-local couplings, crucially enabling parallel data transfer which is beneficial for both superconducting and neutral atom quantum computing platforms. Circuit-level simulations demonstrated that these weight-7 routing codes reduced physical qubit overhead by approximately a factor of 8, compared to surface codes with a similar logical error rate. This work establishes routing codes as a promising approach to bridge the gap between theoretical code performance and practical implementation for fault-tolerant quantum computing.