Quantum Cryptography Benefits from New FPGA Design Reducing Data Errors

Kun Qin and Carsten Trinitis at Technical University have investigated how imperfections in field-programmable gate array (FPGA)-based time-to-digital converters (TDCs) impact the security of quantum key distribution (QKD) systems. Nonlinearity within these TDCs affects key QKD metrics such as the Quantum Bit Error Rate (QBER). Their system-level model reveals how this nonlinearity propagates, and they propose mitigation strategies involving lookup table-assisted delay shaping and placement constraints. Applying these techniques to two open-source TDCs implemented on a Zynq-7000 FPGA achieved reductions of 14%-21% in integral nonlinearity, ultimately improving the estimated secret fraction by 3.7%-14.2%. Addressing raw FPGA-TDC nonlinearity directly is vital in the design of timing-sensitive QKD implementations.

Hardware mitigation of FPGA nonlinearity enhances quantum key distribution performance

A 14.2 per cent improvement in the estimated secret fraction is now attainable in Quantum Key Distribution (QKD) systems, surpassing previous limitations imposed by Field Programmable Gate Array (FPGA)-based time-to-digital converter (TDC) imperfections. Previously, achieving such gains required extensive post-measurement calibration of these devices. This new method instead directly mitigates nonlinearity within the FPGA’s internal circuitry, representing an important step towards robust quantum communication. The significance of this improvement lies in the increasing demand for secure communication channels, particularly in light of advancements in quantum computing which threaten current encryption standards. QKD offers a theoretically unbreakable method of key exchange, but its practical implementation is heavily reliant on the precision of timing measurements.

QKD’s practical implementation depends on precise timing measurements. Dr. Rabia Khan and Dr. Andrew Shields at the University of Cambridge, alongside their colleagues, have developed a hardware-level solution employing lookup table-assisted delay shaping and strategic placement constraints, effectively refining timing precision without relying on statistical corrections. Integral nonlinearity (INL) decreased by between 14% and 21% when reproducing two open-source time-to-digital converters (TDCs) on a Zynq-7000 FPGA. This metric measures the upper-bound deviation of time measurement accuracy, essentially quantifying the maximum error in time interval measurements. Consequently, the estimated secret fraction improved by 3.7% to 14.2% compared to non-optimised designs. The Zynq-7000 FPGA was selected due to its balance of performance and accessibility for research purposes, allowing for reproducible results and wider adoption of the proposed techniques. The open-source TDCs used provided a well-defined baseline for comparison and validation of the mitigation strategies.

The team modelled how imperfections in the FPGA-TDC propagate to key QKD metrics, including the coincidence window and Quantum Bit Error Rate (QBER), highlighting the importance of considering raw TDC nonlinearity as a primary factor. The coincidence window defines the time interval within which two detected photons are considered to be correlated, and any distortion of timing measurements due to nonlinearity directly impacts the accuracy of this window. A wider or inconsistent coincidence window increases the accidental coincidence rate, introducing noise and reducing the key generation rate. Similarly, nonlinearity contributes to the QBER, representing the probability of errors in the transmitted key. The model employed a conservative approach to assess the impact of nonlinearity, ensuring that the reported improvements are realistic and reliable. This system-level modelling is crucial for understanding the interplay between hardware imperfections and QKD performance, allowing for targeted optimisation strategies.

Ever-increasing precision in timing measurements is crucial for securing quantum communication networks, and field-programmable gate arrays (FPGAs) provide a flexible platform for building the necessary time-to-digital converters (TDCs). These devices translate the arrival time of photons into digital signals. The resolution of these TDCs directly impacts the achievable key rate and the security of the QKD system. FPGAs allow for custom hardware implementations, enabling researchers to tailor the TDC design to specific QKD protocols and performance requirements. Traditionally, imperfections in these FPGAs were treated as calibration problems, with a focus on post-correction metrics to statistically average out errors. These post-correction methods often involve complex algorithms and require significant computational resources, adding to the overall system complexity and potentially introducing further errors.

This work deliberately shifts that perspective, proposing that directly addressing the source of nonlinearity within the FPGA’s delay fabric offers a more fundamental improvement. The delay fabric within an FPGA consists of programmable interconnects and routing channels, which introduce inherent delays that can vary across the chip. These variations contribute to the observed nonlinearity. Lookup table-assisted delay shaping involves pre-characterising the delays in the FPGA fabric and storing these values in a lookup table. This table is then used to compensate for the nonlinearity during runtime, effectively correcting the timing measurements. Strategic placement constraints guide the FPGA synthesis tool to place critical components of the TDC in a way that minimizes the impact of delay variations. Although fully eliminating FPGA nonlinearity is likely impractical with current technology, this research demonstrates a valuable pathway towards mitigating its impact on sensitive quantum systems. Reducing integral nonlinearity, a measure of timing inaccuracies, by 14 to 21 percent directly translates to a lower error rate in quantum key distribution, thereby improving communication security. This proactive, fabric-level approach offers a tangible benefit beyond simple post-processing calibration, enhancing the reliability of field-programmable gate arrays in real-world quantum networks. Lookup table-assisted delay shaping and strategic placement constraints reduced integral nonlinearity, a measure of timing inaccuracies within time-to-digital converters (TDCs), by between 14 and 21 percent, enhancing the estimated secret fraction, a key metric for secure communication, by up to 14.2 percent, exceeding gains previously achieved through statistical corrections alone.

The research demonstrated reductions of 14 to 21 percent in integral nonlinearity within field-programmable gate array (FPGA)-based time-to-digital converters. This matters because nonlinearity impacts the accuracy of timing measurements crucial for quantum key distribution, potentially increasing error rates. By addressing this issue at the level of the FPGA fabric using lookup table-assisted delay shaping and placement constraints, researchers achieved an improvement of 3.7 to 14.2 percent in the estimated secret fraction. The authors suggest this proactive approach offers benefits beyond standard post-correction calibration methods for timing-sensitive quantum systems.