Quantum Circuit Synthesis Optimises Noise Reduction via SAT Encoding

A novel encoding of circuit layout synthesis in SAT solving efficiently minimises both circuit depth and CX gate count. Results demonstrate a 10- to 100-fold speed improvement over existing depth-optimisation methods, with minimising CX gate count correlating more strongly with noise reduction than depth alone; however, combined optimisation yields the best results.

The efficient operation of quantum computers relies on the precise arrangement of quantum gates – the fundamental building blocks of quantum algorithms – onto the physical architecture of the quantum processor. This process, known as layout synthesis, is complicated by limitations in qubit connectivity, necessitating the ‘transpilation’ of abstract quantum circuits into forms executable on real hardware. Researchers at Aarhus University and Kvantify Aps, led by Anna B. Jakobsen, Anders B. Clausen, Jaco van de Pol, and Irfansha Shaik, have developed a novel approach to this problem, framing layout synthesis as a Boolean satisfiability (SAT) problem. Their work, detailed in “Depth-Optimal Quantum Layout Synthesis as SAT”, demonstrates a method for generating quantum circuits with minimal depth – the number of sequential operations – or CX-gate count, achieving speed improvements of up to 100x compared to existing depth-optimality guarantees, and importantly, correlating circuit optimisation with noise reduction.

Quantum computation relies on the accurate control of quantum bits (qubits) via sequences of quantum gates. Realising practical quantum algorithms necessitates efficient methods for translating high-level algorithms into these gate sequences – a process known as quantum circuit synthesis. This analysis assesses the performance of several prominent synthesis tools and investigates the relationship between circuit optimisation and resilience to noise.

The study evaluated SABRE Q-Synth, QuilLS, TB-OLSQ2, and OLSQ2, benchmarking their ability to synthesise quantum circuits. Results demonstrate that SABRE Q-Synth consistently exhibits the fastest synthesis times. However, its performance diminishes markedly with increasing circuit complexity. QuilLS, while slower, maintains a more stable performance profile across a broader spectrum of circuit designs. Both TB-OLSQ2 and OLSQ2 consistently underperformed relative to the other tools, suggesting a requirement for substantial algorithmic and implementation refinements.

The research highlights the trade-off between synthesis speed and reliability when selecting a suitable tool. A hybrid approach, leveraging the strengths of different tools for specific circuit characteristics, may offer an optimal solution.

Crucially, the study establishes a correlation between circuit optimisation and noise reduction. Noise, arising from imperfections in quantum hardware, limits the fidelity of computations. The analysis focused on two key metrics: the number of CNOT (CX) gates and circuit depth. CNOT gates introduce decoherence – the loss of quantum information – while circuit depth, representing the number of sequential operations, directly impacts computational cost.

The findings indicate that minimising CX-gate count correlates more strongly with noise reduction than minimising circuit depth alone. However, combining both optimisation strategies yields the most significant improvement in noise resilience, demonstrating a synergistic effect. Reducing circuit depth lowers computational demands, but can increase the susceptibility to errors. Conversely, minimising CX gates reduces decoherence, but may necessitate a deeper circuit.

The observed correlation between circuit optimisation goals and noise reduction provides valuable insight for designing efficient quantum algorithms and circuits. Future research should concentrate on developing novel algorithms and optimisation techniques that address the limitations of current tools and facilitate the creation of more efficient and robust quantum circuits. Expanding benchmark suites to encompass a wider range of circuit complexities and quantum architectures is also essential.