Aqcel Optimiser Cuts Circuit Costs, Improves Fidelity by Reducing Two-Qubit Gates

Quantum computing promises revolutionary advances, but realising this potential demands efficient execution of algorithms on existing hardware, and researchers continually seek ways to minimise computational cost. Toshiaki Kaji, Koji Terashi, and Ryu Sawada, all from The University of Tokyo’s International Center for Elementary Particle Physics, address this challenge with a new approach to optimising quantum circuits. They present an improved version of their state-dependent circuit optimiser, AQCEL, which intelligently reduces unnecessary calculations by focusing on the states of control qubits. This refined method, incorporating a state label manager and a pair removal process, demonstrably shrinks the number of two-qubit gates required to run a circuit, thereby boosting the overall fidelity and paving the way for more reliable quantum computations on near-term devices. Their work, applied to circuits used in the complex parton shower algorithm, showcases a significant reduction in gate counts and a marked improvement in performance compared to existing optimisation techniques.

Quantum Simulation of Particle Collision Dynamics

This document details research into optimizing quantum circuits for simulating high-energy physics, specifically modeling the cascades of particles created in collisions, known as parton showers, and the radiation emitted during these events. Simulating these complex interactions is crucial for interpreting data from experiments like those at the Large Hadron Collider, but demands significant computational resources. Quantum computers offer a potential pathway to accelerate these simulations, however, current devices are limited by noise and the number of qubits available. The research focuses on reducing the complexity of quantum circuits used to model these particle interactions by minimizing circuit depth and qubit count.

Scientists explore techniques like breaking down complex operations into simpler, native gates, removing redundant gates, and finding the most efficient sequence of operations. They also utilize advanced methods like ZX-calculus, Kak decomposition, and Troter-Suzuki decomposition to streamline the circuits, alongside error mitigation techniques to improve accuracy. The foundation of this work relies on understanding key concepts like qubits and quantum gates, where circuit depth is a critical factor in error accumulation. Researchers leverage Python and specialized quantum computing frameworks to program and simulate these circuits, aiming to develop techniques that allow for efficient and accurate simulation of high-energy physics phenomena on near-term quantum computers.

Optimizing Quantum Circuits with Control Qubit Measurements

Scientists have developed a novel approach to quantum circuit optimization, called AQCEL, that streamlines computations by intelligently removing unnecessary operations. Recognizing the limitations of current quantum computers, the team prioritized minimizing the number of quantum gates, particularly the error-prone two-qubit gates, to enhance performance. AQCEL leverages the specific quantum states of control qubits to identify and eliminate redundant operations, tailoring the circuit to the initial conditions of the computation. The core of AQCEL involves measuring the states of control qubits immediately before operations, allowing the system to determine if a gate is truly necessary. Researchers implemented a “state label manager” that reduces the number of state measurements required, and a “pair removal process” that eliminates redundant gate pairings, both contributing to a more efficient circuit. Experiments employed circuits designed for a quantum parton shower algorithm to demonstrate AQCEL’s effectiveness, achieving a substantial reduction in gate counts and an improvement in fidelity compared to conventional optimization techniques and the original AQCEL protocol.

State-Dependent Optimization Reduces Quantum Gate Count

Scientists have developed a circuit optimizer, AQCEL, that significantly enhances the performance of quantum algorithms on current hardware. The core principle behind AQCEL is state-dependent circuit optimization, focusing on identifying and eliminating unnecessary control operations by measuring the states of control qubits. This allows for aggressive reduction of operations, unlike traditional methods that maintain circuit equivalence for all inputs. The team achieved substantial improvements by incorporating two key enhancements into AQCEL: a state label manager and a CX-pair removal process. The state label manager reduces the need for repeated state measurements, streamlining the optimization process, while the CX-pair removal process eliminates redundant gate pairs, further minimizing circuit complexity. Applying AQCEL to circuits designed for the quantum parton shower algorithm, researchers observed a marked reduction in gate counts and a corresponding improvement in fidelity compared to conventional optimization techniques.

AQCEL Optimizes Quantum Circuit Fidelity and Cost

This research introduces AQCEL, a state-dependent circuit optimizer designed to reduce the computational cost of executing quantum algorithms. The team achieved improvements by incorporating a state label manager, which minimizes unnecessary state measurements, and a CX-pair removal process, eliminating redundant two-qubit gates. These enhancements build upon existing optimization techniques and demonstrably reduce the number of gates required to run quantum circuits. Experimental results, obtained using a quantum computer and applied to circuits simulating a parton shower algorithm, show a significant reduction in gate counts and an improvement in circuit fidelity compared to conventional methods.

Specifically, the optimized circuits achieved a Hellinger fidelity of 0. 83 for a two-step quantum parton shower simulation. The authors acknowledge that AQCEL’s effectiveness diminishes with increasing circuit depth due to hardware noise, but remains highly effective for shallow circuits.