Zuchongzhi-3: A closer look at the Chinese 105-Qubit Superconducting Quantum Processor

The University of Science and Technology of China (USTC) has unveiled Zuchongzhi-3, a 105-qubit superconducting quantum processor developed in collaboration with multiple institutions. This advanced system features 182 couplers and demonstrates exceptional performance, operating at speeds surpassing the fastest supercomputers by 10^15 times and outperforming Google’s latest results by one million times.

The processor achieves high fidelities for single-qubit gates (99.90%), two-qubit gates (99.62%), and readout (99.13%), with a coherence time of 72 microseconds, enabling complex operations. It successfully conducted an 83-qubit, 32-layer random circuit sampling task, showcasing its superior computational capabilities. The USTC team is now exploring quantum error correction using surface codes, aiming to enhance scalability and pave the way for future advancements in quantum computing.

The Zuchongzhi-3 quantum processor, developed by the University of Science and Technology of China (USTC), represents a significant advancement in quantum computing. With 105 qubits, it surpasses its predecessor, Zuchongzhi-2, which featured 66 qubits. The processor is designed to perform tasks such as quantum random circuit sampling with high efficiency.

Zuchongzhi-3 employs a 2D grid architecture with 182 couplers, enabling efficient interaction between qubits. It achieves a coherence time of 72 microseconds, providing sufficient time for operations before decoherence occurs. The processor boasts high-fidelity gates: single-qubit gate fidelity at 99.90%, two-qubit gate fidelity at 99.62%, and readout fidelity at 99.13%, ensuring reliable performance in maintaining quantum states.

In a landmark test, Zuchongzhi-3 executed an 83-qubit, 32-layer random circuit sampling task, outperforming classical supercomputers by 15 orders of magnitude. This achievement surpasses Google’s Sycamore processor, which had 53 qubits, demonstrating quantum supremacy in specific tasks.

The processor integrates surface codes for quantum error correction, currently at a distance-7 configuration, with plans to scale up to distances of 9 and 11. This approach enhances fault tolerance, which is crucial for managing errors as the system scales. Higher code distances are expected to improve error detection and correction capabilities, contributing to the system’s reliability.

With its high qubit count, efficient architecture, and focus on error correction, it is setting new benchmarks. While quantum supremacy is a significant proof of concept, the practical impact lies in solving real-world problems faster than classical computers. Continued advancements in error correction and scalability will be key to unlocking this potential.