Folded Surface Code Architecture Achieves Constant Time Logical CNOT Gates

Researchers are tackling the challenge of scaling quantum computing by optimising qubit connectivity and error correction. Zhu Sun and Zhenyu Cai, from the University of Oxford, alongside their colleagues, present a novel architecture utilising short-range qubit shuttling to achieve effective three-dimensional connectivity on standard two-dimensional hardware. Their work demonstrates how this approach enables the native implementation of folded surface codes, dramatically reducing the time required for key quantum operations , including single-qubit logical Clifford gates and CNOTs , to constant time. This represents a significant leap forward, as it substantially lowers the complexity of quantum error correction and paves the way for more efficient and scalable quantum computers, with a demonstrated over ten-fold reduction in the spacetime volume of magic-state distillation.

This work builds upon recent advances in quantum error correction and introduces a scalable architecture that enables the native implementation of folded surface codes, a key innovation for improving computational efficiency. The team achieved a substantial reduction in the runtime of all single-qubit logical Clifford gates and logical CNOT operations within subsets of qubits, decreasing the runtime from O(d), where ‘d’ represents code distance, in conventional surface code lattice surgery to constant time.

Explicit protocols were developed for these operations, and experiments show that access to a transversal S gate reduces the spacetime volume of 8T-to-CCZ magic-state distillation by more than an order of magnitude compared to standard 2D lattice surgery approaches. This represents a significant leap forward in the efficiency of generating the complex quantum states needed for universal computation. Furthermore, the research introduces a new “virtual-stack” layout that efficiently exploits the quasi-three-dimensional structure of the architecture, enabling efficient multilayer routing on these two-dimensional devices. Conceptually, the computing region is viewed as a three-dimensional multilayer structure implemented on a 2D platform, with each layer’s routing space allocated according to the computational tasks performed within it.
This innovative layout allows for flexible allocation of resources, classifying tasks into storage, short-range, mid-range, and long-range operations, and transitions between layers are enabled by low-cost transversal SWAP gates. This breakthrough establishes a pathway towards more scalable and efficient quantum computers by combining short-range shuttling with folded surface codes, offering a promising solution to the challenges of implementing long-range connectivity in a scalable manner. The work opens exciting possibilities for future quantum processors, potentially enabling faster and more complex quantum computations and bringing fault-tolerant quantum computing closer to reality.

Folded Surface Codes and Qubit Shuttle Architecture represent

Scientists engineered a novel qubit shuttling architecture employing short-range movements to achieve effective three-dimensional connectivity on strictly two-dimensional hardware. This work builds upon recent advances in error correction, demonstrating the native implementation of folded surface codes, significantly reducing the runtime for single-qubit logical Clifford gates and logical CNOT operations within qubit subsets to constant time, a substantial improvement over conventional surface code lattice surgery. The team developed explicit protocols for these operations, revealing that access to a transversal gate diminishes the spacetime volume of 8T-to-CCZ magic-state distillation by over an order of magnitude compared to standard two-dimensional approaches. Researchers pioneered a “virtual-stack” layout to efficiently exploit the quasi-three-dimensional structure of the architecture, enabling multilayer routing on these two-dimensional devices.

The study leveraged observations regarding the rotated surface code, noting its temporary transformation into an unrotated form during stabilizer check circuits, and combined this with a transversal gate scheme to realise fully transversal implementations of all three logical Clifford gates, Hadamard, phase, and CNOT, on the rotated surface code. Experiments employed a looped pipeline architecture with short-range qubit shuttling, leveraging the folded surface code to achieve this connectivity. To demonstrate efficiency and universal computation, the team studied the implementation of 8T-to-CCZ distillation factories augmented with magic state cultivation, utilising a variant of an existing circuit. The looped pipeline architecture, combined with the rotated surface code, already achieves a considerable reduction in overhead compared to conventional 8T-to-CCZ factories.

Further adoption of the folded surface code, alongside the availability of a transversal S gate, enables an additional reduction of approximately 2.6 in spacetime volume. Regarding logical code patch layout, scientists proposed a new scheme leveraging the virtual stack structure intrinsic to the architecture, conceptually viewing the computing region as a three-dimensional multilayer structure implemented on two-dimensional hardware. Each layer’s routing space is allocated according to the computational tasks performed within it, classifying these tasks into storage, short-range, mid-range, and long-range operations, transitions between layers are enabled by low-cost transversal SWAP gates. This layout scheme offers flexibility, with existing layouts arising as special cases within this more general framework.

The research details a distance 3 rotated surface code patch, requiring d 2 − 1 ancilla qubits for stabilizer checks, where ‘d’ represents the code distance. One round of these checks, termed a code cycle, involves applying layers of CNOT gates between data and ancilla qubits to verify X and Z stabilizers, with the duration of a single cycle defining the code cycle time. Logical operations are implemented via lattice surgery, merging and splitting code patches, requiring only two-dimensional connectivity, and Hadamard gates are implemented with transversal Hadamard gates followed by a 90-degree patch rotation, taking 1 ancillary patch and 3d code cycles.