Quantum Tensor Representation Via Circuit Partitioning Enables Algorithms on Noisy QPU Hardware

Quantum computing promises to revolutionise computation, yet current quantum processors are prone to errors that limit their potential. Ziqing Guo from Texas Tech University, Jan Balewski from the National Energy Research Scientific Computing Center, and Kewen Xiao from Rochester Institute of Technology, along with their colleagues, address this challenge by introducing a new method called shardQ. This technique cleverly divides complex quantum circuits into smaller, more manageable pieces and then reconnects them, minimising errors and optimising performance. The team demonstrates that shardQ achieves an optimal balance between computational speed and accuracy, a result supported by both theoretical analysis and practical tests on a state-of-the-art quantum processor. This advancement represents a significant step towards building practical, fault-tolerant quantum computers capable of tackling problems beyond the reach of classical machines.

Efficient Quantum Circuit Synthesis via Partitioning

Scientists are developing methods to create more efficient quantum circuits, crucial for overcoming limitations in current quantum computer technology, including a restricted number of qubits and the introduction of errors with each gate operation. Researchers aim to reduce the complexity of quantum computations by strategically breaking down large circuits into smaller, more manageable subcircuits. This approach involves representing quantum states and operations using tensors, a mathematical framework that allows for efficient manipulation and analysis. Algorithms like SparseCut identify and remove redundant parts of the circuit during partitioning, minimizing information loss.

A key optimization step involves performing mid-circuit measurements and reconstructing the final results using classical computation, rather than measuring all qubits at the end. By decomposing quantum gates into simpler Clifford gates and a few non-Clifford gates, scientists can further optimize the circuit for classical simulation and analysis, effectively trading some computational burden from the quantum computer to a classical computer. This exchange is beneficial if it significantly reduces the demands on quantum resources.

Hardware-Aware Quantum Circuit Partitioning and Knitting

Scientists have developed shardQ, a new quantum tensor encoding model designed for superconducting quantum chips operating in the current era of limited quantum technology. This work pioneers an end-to-end approach, starting with circuit partitioning and ending with recomposition, all optimized for the constraints of existing hardware. The team employs dynamic cut control, adjusting partitioning based on qubit number to minimize two-qubit entanglement gates, thereby reducing potential errors. Central to shardQ is a hardware-aware circuit knitting technique that addresses the restricted qubit connectivity common in superconducting quantum processors.

This method intelligently rewires the quantum circuit, bypassing connectivity limitations without adding excessive overhead. By integrating this knitting process with dynamic cut control, scientists simultaneously minimize gate count and optimize circuit layout for the specific hardware topology, enabling the decomposition, distribution, and recombination of large-scale quantum algorithms with reduced error rates and circuit depths. The study leverages the SparseCut algorithm alongside matrix product state (MPS) compilation to achieve efficient circuit partitioning, allowing for systematic exploration of different strategies and identification of those that minimize communication overhead between sub-circuits. Validation experiments, conducted using an IBM superconducting quantum processor, demonstrate the method’s ability to improve both computational speed and accuracy.

ShardQ Reduces Entanglement, Improves NISQ Circuits

Scientists have developed shardQ, a new quantum tensor encoding model designed for superconducting quantum chips operating in the current era of limited quantum technology. This work addresses the challenge of scaling quantum computation by minimizing two-qubit entanglement gates and optimizing circuit execution on hardware with limited connectivity. The team successfully integrated hardware-aware circuit knitting with a dynamic cut control system, based on qubit number, to reduce errors and circuit depths. The foundation of shardQ relies on matrix product states (MPS), a tensor network technique, to mitigate the exponentially growing memory requirements typically associated with quantum state simulation.

Researchers represent the quantum state using MPS, allowing for efficient computation and significantly reducing the computational resources needed to simulate quantum circuits. Experiments demonstrate the effectiveness of shardQ in optimizing quantum tensor encoding. The team achieved a reduction in two-qubit entanglement gates through dynamic cut control, which adjusts based on the number of qubits involved. Furthermore, the integration of hardware-aware circuit knitting effectively addresses the limitations imposed by restricted qubit connectivity, enabling the decomposition, distribution, and recombination of large-scale quantum algorithms with reduced error rates and circuit depths.

ShardQ Enables Low-Error Quantum Image Encoding

Researchers have developed shardQ, a novel method for quantum tensor encoding circuits that addresses a key challenge in scaling quantum computation: extending circuit simulation to future fault-tolerant quantum computers. This approach combines the SparseCut algorithm with matrix product state compilation and a global knitting technique to optimally balance computational time and error rates. Experimental results, obtained using a superconducting quantum processor, demonstrate the feasibility of this strategy and achieve a quantum-encoded image error rate of less than one percent. This work represents a significant step towards enabling more complex and deeply entangled quantum circuits, paving the way for reliable results from future quantum computers and is adaptable to various gate-based quantum platforms, including those based on trapped ions and superconducting qubits. ShardQ is particularly relevant for hybrid quantum-classical high-performance computing environments where quantum circuits may be distributed across different hardware components.