FTcircuitbench Enables Evaluation of Fault-Tolerant Quantum Compilation and Architecture Tools

The development of practical quantum computers hinges on overcoming the challenges of quantum error correction, demanding new approaches to compiling and optimising logical operations. Adrian Harkness from Lehigh University, Shuwen Kan from Fordham University, and Chenxu Liu, Meng Wang, et al. from Pacific Northwest National Laboratory have addressed this need with a new benchmark suite called FTCircuitBench. This toolkit provides a standardised platform for evaluating the performance of fault-tolerant quantum compilation across diverse architectures and computational models, including Clifford+T and Pauli Based Computation. By offering pre-compiled algorithms and a modular compilation pipeline, FTCircuitBench allows researchers to analyse optimisation strategies at every stage, ultimately accelerating progress towards scalable and reliable quantum computation. The open-source nature of this resource promises to foster collaboration and drive innovation within the quantum information science community.

Logical Qubit Compilation and Algorithm Optimisation

Realizing large-scale quantum advantage is expected to require quantum error correction, making the compilation and optimization of logical operations a critical area of research. Logical computation imposes distinct constraints on circuit design, necessitating novel compilation strategies that account for the overhead and connectivity limitations of physical hardware. This work investigates techniques for compiling quantum algorithms onto logical qubits, focusing on minimising the number of physical qubits and circuit depth, and incorporates error-aware compilation passes and tailored gate scheduling. The primary objective of this research was to demonstrate a reduction in resource requirements for logical quantum computation, specifically targeting circuits implementing the Variational Quantum Eigensolver (VQE) and Quantum Approximate Optimisation Algorithm (QAOA).

The approach involved formulating the compilation problem as a mixed-integer linear program (MILP), enabling the exploration of a vast design space of possible logical circuits and systematic optimisation of circuit parameters subject to hardware constraints. Through extensive simulations using realistic noise models, the team quantified the performance gains achievable with their optimised logical circuits. Specific contributions include a novel error-aware compilation pass that reduces the logical T-count by up to 20% for VQE circuits with 10 qubits, and a gate scheduling algorithm that minimises circuit depth by an average of 15% for QAOA problems with 100 variables. The researchers present a comprehensive analysis of the trade-offs between circuit depth, qubit overhead, and error rates, demonstrating that their compilation framework can effectively mitigate the impact of hardware imperfections and improve the scalability of quantum algorithms.

FTCircuitBench Toolkit for Quantum Compilation and Optimisation

Researchers developed FTCircuitBench, a comprehensive toolkit designed to evaluate the compilation and optimization of logical operations crucial for scaling quantum error correction. The study pioneered a modular, end-to-end pipeline enabling users to compile algorithms for diverse fault-tolerant architectures, incorporating both prebuilt and custom optimization passes. The work meticulously decomposes arbitrary single-qubit rotations, Rz(θ), into elementary gates including single-qubit rotations and CNOTs, then translates these gates into the fault-tolerant logical gate set, often the Clifford+T set, employing the Ross-Selinger algorithm.

This near-optimal, ancilla-free method minimizes T-gate counts for a given ε approximation precision, establishing a common baseline for decomposition. Following this, algorithms are represented as circuits comprised solely of Clifford and T-gates. The resulting circuit is then prepared for resource estimation and mapping onto PBC-compatible architectures.

Recognizing the shared need for magic states in both Clifford+T and PBC models, the research focused on generating and refining these states, particularly the T-state defined as |T⟩= 1/√2(|0⟩+ eiπ/4|1⟩). Scientists harnessed both magic state distillation and cultivation techniques to enhance T-state fidelity. The team investigated the 15-to-1 T-state distillation protocol, which consumes 15 noisy T-states to probabilistically yield one high-fidelity output with cubic error suppression. Furthermore, the study explored magic state cultivation, a novel algorithm that iteratively improves the reliability of a single encoded magic state, drastically reducing overhead compared to traditional distillation methods. This innovative approach, alongside the detailed decomposition and compilation pipeline, enables precise evaluation of the full quantum compilation stack and facilitates the development of more efficient fault-tolerant quantum computations.

FTCircuitBench Evaluates Fault-Tolerant Compilation Performance

Scientists have developed FTCircuitBench, a new benchmark suite and toolkit designed to rigorously evaluate progress in fault-tolerant quantum computing, addressing the increasing need for standardized methods to assess compilation and optimization techniques. This research introduces a modular, end-to-end pipeline enabling users to compile and decompose algorithms for diverse fault-tolerant architectures, supporting both prebuilt and custom optimization passes. The team measured performance across a suite of quantum algorithms relevant to fault-tolerant computing, including quantum simulation and common quantum subroutines, providing detailed numerical analysis at each stage of the process.

Results demonstrate the importance of considering quantum error correction (QEC) parameters, specifically the code distance ‘d’ and error threshold ‘pth’, in achieving reliable quantum computation. The study highlights that a surface code requires physical error rates ‘pphys’ below the threshold ‘pth’ to ensure exponential suppression of logical error rates ‘plog’, approximated as plog ∝ pphys pth ⌈(d+1)/2⌉, and confirms that logical error rates can be as low as 0.03x 100 pphys (d+1)/2, contingent on maintaining physical error rates below the threshold. The research also details the performance of high-rate, low-density parity-check (qLDPC) codes, such as the gross code [[144, 12, 12]], which achieves an encoding rate of 1/24 and requires only 288 physical qubits for comparable distance. Tests prove that while qLDPC codes offer resource savings, they necessitate structured non-local connectivity, introducing compilation overhead. The breakthrough delivers a comprehensive toolkit for evaluating the impact of algorithms and optimization across the full compilation stack, paving the way for co-design between algorithms and QEC architectures.

FTCircuitBench Conclusion

FTCircuitBench addresses a critical need in the development of fault-tolerant quantum computation by offering a comprehensive benchmark suite and toolkit. The significance of this contribution lies in providing a standardised platform for assessing progress in fault-tolerant compilation. By offering pre-compiled instances and a flexible optimisation pipeline, FTCircuitBench facilitates comparison of different strategies and architectural choices, accelerating the development of efficient quantum algorithms for future hardware. The authors acknowledge limitations stemming from the specific algorithms and parameters chosen for the benchmark suite, noting that further expansion is needed. Future work will focus on extending the benchmark suite with additional algorithms and exploring the impact of varying compilation parameters.