Cyclic Permutations Enable Zero-Noise Extrapolation on Noisy Intermediate-Scale Quantum Circuits

Mitigating errors on today’s quantum computers is crucial for unlocking their potential, and Zahar Sayapin, Daniil Rabinovich, and colleagues from the Skolkovo Institute of Science and Technology and The Russian Quantum Center have developed a promising new technique to achieve this. Their research introduces a method called Cyclic Layout Permutations based Zero Noise Extrapolation, which cleverly exploits the unique characteristics of errors in current ‘noisy intermediate-scale’ quantum devices. The team demonstrates that by running quantum circuits with subtly rearranged qubit connections and averaging the results, they can effectively estimate the ideal, error-free outcome. Benchmarking against realistic simulations of quantum hardware, this approach reduces errors in calculating results by a significant margin, offering a practical pathway towards more reliable quantum computation with existing technology.

Efficient methods to mitigate hardware errors are crucial for advancing quantum computation, particularly given the limitations of current Noisy Intermediate-Scale Quantum (NISQ) devices, such as their limited qubit counts and connectivity. The method exploits the inherent non-uniformity of gate errors in NISQ hardware and leverages symmetries present in quantum circuits with one-dimensional connectivity to extrapolate towards an ideal, zero-noise result. It is designed for readers seeking a rigorous understanding of the method’s accuracy, limitations, and scaling behavior, assuming a strong background in quantum mechanics, linear algebra, and statistics. The appendix establishes a framework linking the noise model to more general quantum channel descriptions, demonstrating how different types of noise, such as depolarization and dephasing, can be represented within a unified formalism. It also analyzes the statistical uncertainty, or shot noise, arising from a finite number of measurements on a quantum computer, quantifying its impact on the accuracy of the error-mitigated results. The team derived expressions for the variance of the error-mitigated estimate and demonstrated that the standard deviation scales as 1/√(mN), where ‘m’ is the number of independent measurement sets and ‘N’ is the number of shots per measurement. This approach leverages the non-uniformity of gate errors inherent in current quantum hardware and exploits symmetries within circuits possessing one-dimensional connectivity. The team demonstrated that, for an n-qubit circuit, CLP-ZNE requires measurements of only O(n) different circuit layouts to reconstruct the noiseless expected value, significantly reducing computational complexity. Experiments benchmarked against noise channels modeling the IBM Torino quantum computer revealed a substantial reduction in expectation value error, ranging from a factor of 8 to 13 for n = 12 qubit random instances of the Sherrington-Kirkpatrick model, depending on protocol adjustments.

The method effectively suppressed typical errors by an order of magnitude, and in simulations employing a simplified depolarization noise model, error suppression reached even higher orders of magnitude. Researchers modeled realistic device conditions by incorporating both depolarizing noise and T1/T2 relaxation processes derived from IBM Torino calibration data, demonstrating the protocol’s applicability to present-day NISQ processors. The team formally proved that the protocol can mitigate both unital and non-unital noise, and that linear extrapolation of noisy expectation values from cyclically permuted layouts yields unbiased estimates of noiseless observables up to quadratic noise terms. This method exploits the variations in error rates across the qubits of a quantum processor and leverages the symmetry of circuits with specific connectivity patterns to estimate a noiseless result. The core achievement lies in demonstrating that the noiseless expectation value can be accurately recovered by performing a linear extrapolation based on measurements from a limited number of cyclic circuit layouts. This approach represents a significant reduction in complexity compared to previous methods, scaling linearly with the number of qubits.

The team analytically proved the accuracy of this extrapolation, up to second order in the noise strength, and validated these findings through numerical simulations using parameters relevant to the IBM Heron processor. Investigations also revealed that performing a more detailed, multi-linear extrapolation can further enhance the accuracy of the mitigated values. This research provides a promising pathway towards improving the fidelity of quantum computations on near-term devices, offering a practical tool for researchers working with NISQ technology.