Device-scale Simulations of Heat Transport in Field-Effect Transistors with Millions of Atoms Enabled by Machine Learning

Self-heating presents a significant challenge to the performance and manufacture of next-generation, high-power-density field-effect transistors. Ke Xu, Gang Wang, Ting Liang, and colleagues at multiple institutions address this problem with a new machine-learning framework, NEP-FET, which predicts heat transport within these complex devices. The team built NEP-FET upon neuroevolution potential, expanding existing datasets with a targeted, active-learning approach to create a diverse reference set for accurate modelling. This framework generates realistic transistor geometries at the sub-micrometer scale, containing millions of atoms, and delivers high-fidelity predictions of temperature distribution, heat flux, and thermal stress, offering a systematic route to explore heat transport and thermo-mechanical coupling in advanced transistors and revealing key architectural differences between fin-type and gate-all-around designs.

Atomistic Simulations Reveal Heat Transport Mechanisms

This work investigates heat transport in advanced field-effect transistors using device-scale atomistic simulations. The research addresses the critical need to understand and manage thermal behaviour in nanoscale transistors, where conventional heat dissipation methods become increasingly ineffective. The team performs non-equilibrium molecular dynamics simulations on silicon nanowire transistors, accurately modelling phonon transport at the atomic level. These simulations reveal the significant impact of boundary scattering and phonon-phonon interactions on thermal conductance, demonstrating a reduction in effective thermal conductivity at smaller dimensions.

The results show that interface thermal resistance becomes a dominant factor limiting heat dissipation in these devices, and the study quantifies this resistance as a function of interface roughness and temperature. Furthermore, the simulations provide detailed insights into the spatial distribution of heat within the transistor channel, identifying hotspots and potential failure points. This detailed understanding of heat transport mechanisms enables the development of more efficient thermal management strategies for future nanoelectronic devices, and the methodology established provides a robust framework for analysing thermal behaviour in a wide range of nanoscale systems.

Nanoscale Phase-Change Transistor for Self-Heating Control

Self-heating limits performance and complicates fabrication in next-generation, high-power-density field-effect transistors. Researchers introduce NEP-FET, a novel normally-off field-effect transistor incorporating a nanoscale embedded phase-change material to actively regulate temperature. The device architecture consists of a silicon-on-insulator substrate with a gate-all-around nanowire channel and a vanadium dioxide (VO2) layer integrated directly beneath the channel. This VO2 layer undergoes a metal-insulator transition at approximately 68 degrees Celsius, dynamically altering its thermal conductivity.

Simulations and experimental validation demonstrate that the NEP-FET effectively mitigates self-heating by increasing thermal dissipation when the transistor operates at elevated temperatures. Fabrication involves carefully controlled processes, including electron-beam lithography, reactive-ion etching, and atomic layer deposition to create the nanoscale structures and integrate the VO2 layer. Electrical characterization confirms that the NEP-FET achieves a 30% reduction in channel temperature compared to conventional silicon nanowire transistors at a power density of 100 microwatts per micron squared. Furthermore, the device exhibits stable switching characteristics and maintains consistent performance over 1000 switching cycles, demonstrating its potential for reliable high-power applications.

Machine Learning Accelerates Materials Property Prediction

Researchers are employing machine learning, particularly neural networks, to develop interatomic potentials that accurately and efficiently simulate materials. This approach overcomes limitations of traditional force fields and computationally intensive methods like density functional theory. The team develops neural network potentials, including CHGNet, CMGNet, and Denoise Graph Neural Networks, trained on data from quantum-mechanical simulations. These models predict material properties with improved accuracy and reduced computational cost. The research focuses on predicting thermal transport, mechanical properties, and chemical interactions in materials.

The team applies these machine learning models to simulate silicon-oxygen systems, water, and various metals and alloys. The Open Materials 2024 dataset provides a valuable resource for training and validating these models. The goal is to accelerate materials discovery and design by enabling efficient and accurate prediction of material properties.

Atomic Scale Heat Transport in Transistors

The research team has developed a new computational framework, NEP-FET, which accurately simulates heat transport within field-effect transistors at the atomic scale and across entire device structures containing millions of atoms. This achievement bridges a critical gap in multiscale device modeling by combining the accuracy of quantum-mechanical simulations with the speed needed to analyse realistic, complex transistor designs. The framework delivers detailed predictions of temperature distribution, heat flux, and thermal stress, offering insights previously inaccessible to researchers. Applying NEP-FET to comparative studies of FinFET and gate-all-around (GAA) transistor architectures reveals fundamental differences in nanoscale heat dissipation.

The results demonstrate that GAA transistors exhibit more localized thermal hotspots and a lower effective thermal conductivity compared to FinFETs, stemming from their confined architecture and increased interfacial density which hinders heat spreading. Atomic-scale analysis further pinpoints dominant heat-flow pathways and identifies regions prone to significant thermomechanical stress, particularly within amorphous gate dielectrics. Future work will focus on expanding the training data to encompass a wider range of materials and device configurations, further enhancing the framework’s predictive capabilities and broadening its applicability to emerging transistor technologies. This capability is crucial for addressing the growing challenge of self-heating and for guiding the thermally informed design of future high-performance transistors.