Lightmatter and Cadence are joining forces to accelerate the development of co-packaged optics (CPO) – a critical advancement for next-generation AI infrastructure. Announced January 26, 2026, the technical collaboration will integrate Cadence’s high-speed SerDes IP with Lightmatter’s Passage™ optical engine, moving beyond traditional data transfer methods to fully integrated, 3D-stacked photonic interconnects. This partnership aims to solve complex optics-electronics integration challenges, paving the way for high-performance, manufacturing-ready CPO in hyperscale AI data centers. “The next big leap in AI performance requires a fundamental change in how we move data,” said Ritesh Jain, SVP of Engineering & Operations at Lightmatter, emphasizing the significance of this move toward increased energy efficiency and bandwidth density for future AI models.
Lightmatter Passage Engine Enables 3D-Stacked Silicon Photonics
Lightmatter’s Passage engine is driving a shift toward 3D-stacked silicon photonics, a critical advancement for hyperscale AI data centers, according to a January 26, 2026 announcement. This technology moves beyond conventional data transfer methods, transitioning from pluggable and near-packaged optics to fully integrated interconnects. The Passage platform—described as “the world’s first 3D-stacked silicon photonics engine”—connects thousands to millions of XPUs, directly tackling data bottlenecks within AI systems and promising significant gains in bandwidth density and energy efficiency. Lightmatter’s technology is intended to redefine the architecture of next-generation AI infrastructure.
The company is collaborating with Cadence to integrate Cadence’s high-speed SerDes IP with the Passage optical engine, paving the way for manufacturing-ready co-packaged optics (CPO). Industry analyst Roy Chua stated, “While the industry has long debated the timing of CPO, the move toward integrated 3D-stacked photonic designs is now inevitable,” highlighting the importance of this architectural foundation.
Cadence SerDes & UCIe IP Optimize Co-Packaged Optics
Cadence and Lightmatter are collaborating to optimize co-packaged optics (CPO) for hyperscale AI data centers, moving beyond conventional data transfer methods. This transition to fully integrated, 2D and 3D-stacked photonic interconnects is positioned as a pivotal moment for AI infrastructure development, addressing limitations of current systems. The partnership leverages Cadence’s Universal Chiplet Interconnect Express™ (UCIe™) IP for disaggregation alongside their established EDA expertise.
Boyd Phelps, SVP and GM of the Silicon Solutions Group at Cadence, stated, “Cadence is dedicated to providing next-generation optical interconnect solutions to optimize data center performance and efficiency.” Industry analyst Roy Chua of AvidThink emphasized the inevitability of 3D-stacked photonic designs, calling the collaboration “crucial because it addresses the architectural foundation of electrical-optical connectivity integration.” The aim is to deliver scalable, power-efficient AI systems by optimizing advanced CMOS IP with a future-ready CPO design.
Industry Shifts to CPO for Next-Gen AI Infrastructure
A fundamental shift is underway in AI infrastructure, with the industry increasingly focused on co-packaged optics (CPO) to overcome limitations in data transfer, according to industry analysts. This collaboration intends to deliver manufacturing-ready CPO solutions leveraging advanced-node CMOS technology. The demand for increased AI capacity is driving this change, as scale-up and scale-out strategies redefine infrastructure requirements.
As AI capacity continues to expand dramatically to accommodate unprecedented demand and workloads, scale-up and scale-out are transforming AI infrastructure.
Boyd Phelps, SVP and GM of the Silicon Solutions Group at Cadence
