EnSilica has been awarded a £5 million contract by the UK Department for Science, Innovation and Technology (DSIT) to develop a commercial-off-the-shelf (COTS) Application-Specific Integrated Circuit (ASIC) implementing Capability Hardware Enhanced RISC Instructions (CHERI) architecture. This chip, developed at EnSilica’s Oxford facilities, will integrate the company’s Post Quantum Cryptography (PQC) accelerator IP to provide resilience against attacks from quantum computers. The device is designed to meet ISO 26262 and ISO/SAE 21434 standards, targeting high-integrity applications within defence, industrial, automotive, and aerospace sectors, and supports the UK Government’s semiconductor strategy for enhanced cybersecurity.
EnSilica Awarded Funding for Secure Chip Development
EnSilica has been awarded £5 million ($6.6m USD) by the UK Government to develop a commercial-off-the-shelf (COTS) secure processor chip. This funding, delivered through a ‘Contract for Innovation’, builds on the Digital Security by Design (DSbD) program and focuses on integrating Capability Hardware Enhanced RISC Instructions (CHERI). CHERI is a key hardware security architecture designed to eliminate common memory safety vulnerabilities exploited in modern cyberattacks, offering a fundamental shift in how security is approached at the silicon level.
The resulting chip will target critical national infrastructure applications demanding both high security and functional safety, with relevance spanning defence, automotive, industrial, and aerospace sectors. Importantly, the design will adhere to stringent standards like ISO 26262 and ISO/SAE 21434, ensuring compliance with automotive and industrial safety regulations. EnSilica is also incorporating its Post Quantum Cryptography (PQC) accelerator IP, future-proofing the chip against emerging threats from quantum computers – a technology projected to drive a $9.4 billion market by 2033.
This initiative aligns with the UK’s semiconductor strategy and aims to bolster national resilience in cybersecurity. EnSilica’s existing track record – including over ten million ISO 26262 ASIL-D qualified chips shipped – positions the company well to deliver this crucial technology. Experts highlight this project as a key step in combating cyber threats and strengthening the UK’s position as a leader in hardware security innovation, paving the way for more secure and resilient commercial products.
CHERI and Post-Quantum Cryptography Implementation
EnSilica has secured £5 million ($6.6m USD) from the UK Government to develop a commercial-off-the-shelf (COTS) secure processor chip integrating both CHERI and Post-Quantum Cryptography (PQC) acceleration. This initiative builds on the Digital Security by Design (DSbD) program, aiming to mitigate memory safety vulnerabilities—a major source of cyberattacks—through the CHERI hardware architecture. Crucially, the chip will address the emerging threat of quantum computing by incorporating PQC, protecting data against future “harvest now, decrypt later” attacks.
The resulting chip will target high-security, safety-critical applications across defence, automotive, and industrial sectors, adhering to standards like ISO 26262 and ISO/SAE 21434. EnSilica’s PQC IP is projected to capitalize on a rapidly expanding market – forecasted to grow from $310 million in 2024 to $9.4 billion by 2033 (45% CAGR). This IP allows for customisation and reuse across projects, reducing development costs and strengthening EnSilica’s competitive edge, validated by a licensing agreement with a major semiconductor networking company.
This government funding highlights the strategic importance of hardware-level security. The CHERI architecture, coupled with PQC, represents a proactive approach to building resilient systems against both current and future threats. Experts believe this initiative will not only bolster the UK’s critical national infrastructure but also contribute to a more robust domestic semiconductor supply chain, positioning the UK as a leader in secure silicon development.
Government Support for UK Semiconductor Resilience
The UK Government is investing £5 million in EnSilica to develop a commercial-off-the-shelf (COTS) secure processor chip, bolstering national semiconductor resilience. This ‘Contract for Innovation’ directly supports the commercialisation of Capability Hardware Enhanced RISC Instructions (CHERI) – a hardware-based security architecture designed to eliminate entire classes of memory safety vulnerabilities exploited in modern cyberattacks. The chip targets critical infrastructure, automotive, industrial, aerospace and defence, signalling a proactive approach to safeguarding vital systems.
This initiative isn’t just about current security; it’s future-proofing against quantum computing threats. EnSilica’s chip will integrate Post Quantum Cryptography (PQC) accelerator IP, protecting data against “harvest now, decrypt later” attacks – where data is captured today to be unlocked by future quantum computers. The PQC market is projected to explode from $310 million in 2024 to $9.4 billion by 2033 (a 45% CAGR), highlighting the urgency and strategic importance of this investment.
Crucially, this funding forms part of a wider £21 million UK Government push to accelerate advanced hardware security technologies. EnSilica’s track record – including shipping over ten million ISO 26262 ASIL-D qualified automotive chips – positions them well to deliver this critical technology. The project aims to integrate CHERI into mainstream devices, reducing cyber threats and strengthening the UK’s technology supply chain, according to Innovate UK’s Prof. John Goodacre.
