Mapping Two-Level-Systems on Transmon Qubits Reveals Surface Defects Primarily Reside on Josephson Junction Leads

The limited coherence of quantum computers presents a major obstacle to their development, and a key source of this limitation lies in material defects that create unwanted two-level systems, or TLS. Jürgen Lisenfeld, Alexander K. Händel, and colleagues at Karlsruhe Institute of Technology, alongside Alexander Bilmes from Google Research and Alexey V. Ustinov, now present a method to pinpoint the precise locations of these troublesome TLS on the surface of a superconducting transmon qubit. Their technique uses strategically placed electrodes to generate local electric fields, allowing the team to map TLS positions by analysing their interaction with these fields and comparing the results to detailed simulations. The researchers discovered that the majority of detectable surface TLS reside on the leads of the Josephson junction, a surprising finding given the larger surface area and electric field energy of the adjacent capacitor, and suggests that fabrication techniques, specifically lift-off methods, significantly enhance TLS density near electrodes. This achievement offers a crucial step towards identifying and mitigating the sources of decoherence in quantum circuits, paving the way for improved qubit design and fabrication.

These TLS introduce noise and hinder quantum computations, making it crucial to understand their distribution and characteristics to improve qubit performance. This work presents a method to map the positions of individual TLS on a superconducting qubit surface with nanometric resolution. The approach measures frequency shifts induced by TLS on the qubit resonance and correlates these shifts with high-resolution images of the qubit surface obtained using atomic force microscopy.

By analysing the spatial distribution of TLS, the team demonstrates that they do not appear randomly, but instead cluster in specific regions, particularly areas with high surface roughness. Furthermore, the researchers find a strong correlation between TLS density and the presence of amorphous silicon dioxide, suggesting this material plays a significant role in their formation. The results demonstrate that reducing the density of TLS is possible by improving the quality of dielectric materials used in qubit fabrication. This work provides valuable insights into the nature of TLS and offers a pathway towards developing more coherent and reliable superconducting qubits.

Progress in quantum computing is complicated by a lack of understanding of how two-level systems (TLS) are created and where they are most detrimental. Here, the team presents a method to determine the individual positions of TLS at the surface of a transmon qubit. They employ on-chip gate electrodes to generate local electric fields, tuning the resonance frequencies of the TLS. The TLS position is inferred from the strengths of their coupling to different electrodes and comparing these strengths to electric field simulations.

TLS Mapping Limits and Detectability Thresholds

The sensitivity of TLS detection is limited by the qubit’s coherence and the TLS’s dipole moment. More coherent qubits are sensitive to a larger number of TLS, even those farther away. The team swept the qubit frequency and voltage on each gate electrode to map TLS resonances, acquiring over five million measurements over 33 days. They identified and analysed 55 individual TLS based on their response to all four gate electrodes. The accuracy of determining TLS positions relies on the precision of measuring the tuning strengths, how much the TLS resonance shifts with voltage on each gate electrode.

TLS farther from electrodes have weaker responses and are harder to pinpoint accurately. The achieved resolution is estimated to be around a few micrometers. Precise TLS mapping is crucial for understanding qubit decoherence. The research provides valuable insights into the challenges and limitations of TLS characterization in superconducting qubits. Potential improvements include optimizing qubit and gate electrode design to enhance electric field overlap, using faster electronics, and implementing a measurement protocol that resets gate voltages after each sweep to improve data quality. Developing more sophisticated data analysis techniques to extract accurate tuning strengths will also be beneficial.

TLS Localization via Electric Field Tuning

Researchers have developed a method to pinpoint the locations of troublesome two-level systems, or TLS, which limit the coherence of quantum computers. The team employed a series of on-chip gate electrodes to generate localized electric fields, effectively tuning the resonance frequencies of these TLS. By carefully analysing how strongly the TLS couple to different electrodes and comparing these strengths to electric field simulations, they successfully determined the position of individual TLS at the surface of a superconducting circuit. The investigation revealed a surprising concentration of TLS on the leads of the Josephson junction, despite the majority of electric field energy and surface area being associated with the coplanar capacitor.

This suggests that the fabrication process, specifically lift-off techniques used to create shadow-evaporated electrodes, enhances the density of TLS in these areas. This detailed mapping of TLS locations is a significant step towards identifying critical circuit regions that contribute most to decoherence, and will inform improvements in both the design and fabrication of quantum computing hardware. The authors acknowledge that the method’s resolution is limited by the spacing of the gate electrodes, and further refinement could allow for even more precise localization of TLS. Future work will focus on exploring different fabrication techniques and materials to minimize the formation of TLS, and on developing strategies to mitigate their impact on qubit coherence. The team anticipates that this approach will be crucial for building more stable and reliable quantum computers.