Quantum Leap: 2xN Array of Qubits Could Unlock Fault-Tolerant Quantum Computing

Quantum computing has the potential to solve tasks beyond the capabilities of classical computers, but requires extremely low logical error rates. Quantum error correction can bridge this gap, but presents experimental challenges. This paper explores a 2xN array of qubits, demonstrating that error correction is possible and identifying suitable codes for this platform. Using silicon spin qubits as an example, the authors provide a protocol for achieving full universal quantum computation. Numerical simulations show that both surface code and more complex qLDPC codes efficiently suppress noise, suggesting that a 2xN array of qubits could be a promising platform for fault-tolerant quantum computing.

What is the Potential of a 2xN Array of Qubits for Quantum Computing?

Quantum computing holds the potential to solve tasks that are beyond the capabilities of classical computers. However, to realize this potential, deep quantum algorithms that require extremely low logical error rates are needed. This is far from what can be directly achieved on physical devices. Quantum error correction promises to bridge this gap by increasing the qubit overhead to build quantum error correcting codes. However, these architectures represent formidable experimental challenges as they require the entanglement of a large number of qubits and the repeated measurement of a considerable number of operators called stabilisers.

The main example of error correcting code that respects these constraints is the surface code. Its high threshold, which is the maximum error rate the code can tolerate to exponentially reduce errors, makes it one of the best candidates for achieving fault tolerance. However, more general quantum low-density parity-check codes have been constructed that demonstrate better performance in finite-size simulations. These codes seem more challenging to realize experimentally due to their long-range interactions, but they have the potential to considerably lower the qubit overhead due to their higher rate and better distance scaling.

Can Lower Dimensional Structures Support Fault Tolerance?

In the near future, it may prove less challenging to develop lower dimensional structures. This paper explores a 2xN array of qubits where the interactions between non-neighbouring qubits are enabled by shuttling the logical information along the rows of the array. Despite the apparent constraints of this setup, the authors demonstrate that error correction is possible and identify the classes of codes that are naturally suited to this platform.

Focusing on silicon spin qubits as a practical example of qubits believed to meet the requirements, the authors provide a protocol for achieving full universal quantum computation with the surface code. They also address the additional constraints that are specific to a silicon spin qubit device. Through numerical simulations, they evaluate the performance of this architecture using a realistic noise model, demonstrating that both surface code and more complex qLDPC codes efficiently suppress gate and shuttling noise to a level that allows for the execution of quantum algorithms within the classically intractable regime.

What is the Feasibility of Quantum Error Correction in a 2xN Array of Qubits?

The authors study the feasibility of quantum error correction in the most constrained experimental setup beyond 1D, a 2xN array of qubits. Long-range interactions are implemented by assuming that the qubits can be collectively shuttled along one of the two lines of the array. Several qubit platforms have been shown to be suitable to implement such an operation with high fidelity, including atom arrays, ion traps, or spins qubits.

The authors establish a precise framework to determine the classes of codes that can be efficiently implemented in this device. This study is then applied to two specific examples: the surface code and higher-rate qLDPC codes. They demonstrate that universal quantum computation is possible in a practical setup based on silicon spin qubits despite the additional experimental constraints that the geometry entails.

How Do Higherrate qLDPC Codes Perform Under Noise Processes?

The authors evaluate the performance of higherrate qLDPC codes under the noise processes that are anticipated for relevant devices. They demonstrate that despite their complexity, these codes do give an advantage over the surface code in a noise domain that is practically achievable.

For simplicity, their analysis assumes a strictly 2xN array. In practice, given the long device length that would be required for meaningful postclassical tasks, it is reasonable to assume that a real device could incorporate a plurality of junctions, thus the overall geometry would be a lattice formed of long 2xN sections.

What Does This Mean for the Future of Quantum Computing?

This work brings us one step closer to the execution of quantum algorithms that outperform classical machines. The authors demonstrate that error correction is possible in a 2xN array of qubits, and identify the classes of codes that are naturally suited to this platform. They also provide a protocol for achieving full universal quantum computation with the surface code, while also addressing the additional constraints that are specific to a silicon spin qubit device.

Through numerical simulations, they evaluate the performance of this architecture using a realistic noise model, demonstrating that both surface code and more complex qLDPC codes efficiently suppress gate and shuttling noise to a level that allows for the execution of quantum algorithms within the classically intractable regime. This suggests that lower dimensional structures can indeed support fault tolerance, and that a 2xN array of qubits could be a promising platform for achieving fault tolerant quantum computing.