Hardware-efficient Mølmer-Sørensen Gate Achieves 92.47% Fidelity on Superconducting Quantum Computers

The development of robust and high-fidelity entangling gates represents a central challenge in building practical quantum computers, and researchers continually explore alternatives to standard operations. M. AbuGhanem and colleagues now demonstrate a hardware-efficient implementation of the Mølmer-Sørensen gate on superconducting processors, achieving a significant milestone in expanding the capabilities of this technology. The team’s gate achieves a process fidelity of 92. 47%, a performance competitive with the native controlled-NOT gate on the same hardware, and successfully prepares the desired quantum state. This result demonstrates that non-native gates can be optimised to match the performance of hardware-specific operations, broadening the range of algorithms available for implementation on current quantum processors and establishing a valuable benchmark for comparing gate performance across different quantum computing platforms.

A Hardware-Efficient Mølmer-Sørensen Gate for Superconducting Quantum Computers The Mølmer-Sørensen gate, a cornerstone entangling operation in trapped-ion systems, presents a promising alternative to standard entangling gates in superconducting quantum architectures. This work demonstrates a hardware-efficient implementation of the Mølmer-Sørensen gate on a superconducting processor and characterizes its performance using quantum process tomography. The research focuses on achieving high-fidelity entanglement, a critical requirement for scalable quantum computation, by adapting a gate originally developed for a different physical platform. This implementation overcomes limitations of existing superconducting gates, potentially enabling more complex quantum algorithms and improved quantum error correction schemes.

Quantum process tomography was performed on a superconducting processor, achieving a process fidelity of 92. 47%, competitive with the processor’s native controlled-NOT gate at 93. 02% fidelity. Furthermore, the gate prepares a target Bell state with 94. 2% success probability, confirming its correct logical operation.

Mølmer-Sørensen Gate Performance and Benchmarking

This research details a comprehensive investigation into quantum computing, with a strong emphasis on the practical implementation and benchmarking of quantum gates, particularly the Mølmer-Sørensen gate. The study covers a broad range of topics, including diverse quantum computing platforms, such as superconducting qubits and trapped ions, with a comparative analysis of their strengths and weaknesses. It also explores methods for characterizing gate performance, including randomized benchmarking and quantum process tomography, stressing the importance of accurate and robust benchmarking for assessing progress in quantum hardware.

The work also addresses error mitigation and correction techniques, including noise-aware circuit design and the pursuit of fault-tolerant quantum computing, framed within the context of the Noisy Intermediate-Scale Quantum (NISQ) era. The authors emphasize the importance of full quantum process tomography to characterize the performance of quantum gates, aiming to provide a comprehensive understanding of the gate’s performance, identify sources of error, and guide efforts to improve its fidelity.

Mølmer-Sørensen Gate Achieves High Fidelity on Superconductor

This research demonstrates a successful implementation of the Mølmer-Sørensen gate, a key entangling operation typically used in trapped-ion systems, on a superconducting quantum processor. Achieving a process fidelity of 92. 47%, the gate performs competitively with the processor’s native controlled-NOT gate, which attained 93. 02% fidelity. These results confirm the correct logical operation of the gate, specifically its ability to prepare a target Bell state with high probability. This work expands the possibilities for algorithm design on current quantum processors by demonstrating that high-performance gates from different quantum architectures can be efficiently incorporated without significant fidelity loss.

The team established a benchmark for comparing gate performance across different platforms, providing valuable insights into the interplay between compilation strategies, circuit complexity, and realized performance on noisy hardware. The authors suggest that future quantum compiler designs should consider a broader range of efficiently compilable gates, rather than being limited to a fixed native gate set, to optimize circuit depth and leverage hardware-specific advantages.