Echo Cross Resonance Gate Error Budgeting Achieves 3.7x Performance Improvement

Scientists are tackling the persistent challenge of achieving consistently high-fidelity quantum operations, crucial for building practical, fault-tolerant quantum computers. Travers Ward, Russell P. Rundle, and Richard Bounds, from OQC, alongside Norbert Deak, Gavin Dold, and Apoorva Hegde et al., present a novel error budgeting procedure specifically designed for the native two-qubit gate on OQC’s Toshiko gen-1 superconducting quantum processor. This research is significant because it identifies and mitigates key error sources , including coherent error and control leakage , using readily implementable pulse-shaping and compensating gates, requiring minimal additional hardware or calibration. Their work demonstrates an impressive average 3.7x reduction in two-qubit gate error rates across a 16-qubit chain, improving median error rates from 4.6 to 1.2 via interleaved randomised benchmarking , a vital step towards consistently good performance across entire quantum devices.

ECR Gate Error Reduction on Toshiko

Scientists have demonstrated a significant advancement in reducing error rates on a 32-qubit Superconducting quantum computer, the OQC Toshiko gen-1 system. Researchers meticulously analysed the sources of error affecting the native two-qubit echo cross resonance (ECR) gate, a crucial operation for fault-tolerant quantum computation. The study reveals a detailed error budgeting procedure, identifying prevalent issues such as coherent error and control qubit leakage, and subsequently applying targeted error suppression strategies. These techniques, utilising pulse-shaping and compensating gates, require minimal additional hardware or calibration, making them readily implementable for routine use.
The team achieved an average 3.7x reduction in error rate for two-qubit operations across a chain of 16 qubits, as measured by interleaved randomized benchmarking. Specifically, the median error rate improved dramatically from 4.6% to 1.2%, showcasing a substantial leap in performance. This breakthrough wasn’t simply an average improvement; the most significant gains were observed on previously under-performing qubit pairs, highlighting the effectiveness of the error suppression in levelling out performance inconsistencies across the device. This work establishes the importance of practical error mitigation in achieving consistently high-quality gate operations and unlocking the potential of near-term quantum applications.

Experiments involved quantifying three primary error sources: incoherent errors stemming from qubit energy relaxation and dephasing, control qubit leakage where unintended state transitions occur, and coherent error primarily caused by the background ZZ interaction between qubits. By meticulously measuring these contributions, the researchers were able to tailor error suppression strategies to address the most impactful issues. Pulse-shaping techniques were employed to minimise control leakage, while additional compensating rotations were implemented to counteract coherent errors. The success of these methods demonstrates a pathway towards enhancing the reliability of quantum computations without necessitating complex hardware modifications.

This research doesn’t just present a diagnostic tool; it delivers a practical solution for improving the performance of existing quantum hardware. The observed 3.7x reduction in error rate, coupled with the improvement from 4.6% to 1.2% median error, signifies a tangible step towards building more robust and scalable quantum computers. Furthermore, the techniques developed are designed for routine adoption, requiring minimal overhead in terms of calibration or additional hardware, paving the way for widespread implementation and accelerating progress in the field of quantum computation. Researchers first estimated the prevalence of coherent error and control leakage across each qubit, then implemented error suppression strategies targeting the most significant error sources, specifically, pulse-shaping and compensating gates, without requiring additional hardware or extensive calibration. This approach enabled an average reduction of 3.7x in error rate for two-qubit operations across a chain of 16 qubits, with the median error rate improving from 4.6 to 1.2 as measured by interleaved randomized benchmarking. The largest performance gains were observed on previously under-performing qubit pairs, highlighting the importance of practical error suppression for achieving consistent performance across the device.

The study pioneered a method for quantifying incoherent error by extracting relaxation and dephasing rates from each qubit pair. These rates were then input into an analytic formula to determine the resulting error rate, and coherence measurements were repeated over many hours, with median values taken to average out fluctuations in coherence time. Researchers found incoherent error probabilities ranging from 0.3% to 0.8%0.1, 1%) for seven pairs, and negligible errors

Error rates reduced 3.7x on Toshiko qubits

Scientists achieved a 3.7x reduction in error rate for two-qubit operations on the OQC Toshiko gen-1 quantum computer. The research team meticulously analysed error sources and implemented suppression strategies, resulting in significant performance gains across a chain of 16 qubits. This breakthrough delivers substantial improvements in gate fidelity, paving the way for more reliable quantum computations. Measurements confirm a median error rate improvement from 4.6% to 1.2% as determined by interleaved randomized benchmarking, demonstrating the effectiveness of the error mitigation techniques.

Experiments revealed that incoherent errors, stemming from decoherence mechanisms like energy relaxation and dephasing, contribute between 0.3% and 0.8% to the error rate for different qubit pairs. The team estimated these incoherent error probabilities using measured T1 and T2e coherence times, employing median values to account for temporal fluctuations. Data shows that the durations of the ECR gates range from 250ns to 460ns, during which time incoherent errors can occur, establishing a lower limit on the error-per-gate. Tests prove that the echo sequence used in the ECR gate mitigates fluctuations in the control qubit frequency, although sensitivity to target qubit fluctuations remains.

Researchers also quantified control qubit leakage, a detrimental error source arising from off-resonant driving pulses during cross-resonance interactions. The study identified three primary leakage pathways, Λ01, Λ12, and Λ02/2, and developed a procedure to assess their impact on specific qubit pairs. Results demonstrate that the size of peaks observed in error amplification circuits correlates with the magnitude of each leakage type, allowing for targeted error suppression. The team’s analysis, utilising circuits with repeated applications of cross-resonance pulses, enabled the identification of these leakage errors and their contribution to overall gate infidelity.

Measurements confirm that the largest improvements in gate fidelity were observed on previously under-performing qubit pairs, highlighting the importance of practical error suppression in achieving consistent performance across the device. The Toshiko system, comprising 35 fixed-frequency coaxmon qubits, with 32 connected and available, was operated in a commercial data center environment in Tokyo for this work. The coaxmon architecture utilises aluminium superconducting material on a sapphire substrate, with 3D control wiring anchored directly to the QPU package, facilitating qubit control and readout. Through-sapphire pillars further mitigate low-frequency cavity modes, enhancing qubit stability and performance.

Error Reduction in 16-Qubit Chains Achieved

Scientists have demonstrated a new error budgeting and calibration procedure on a 32-qubit quantum computer, the OQC Toshiko Gen-1 system. This work focused on improving the fidelity of two-qubit operations, a crucial step towards fault-tolerant quantum computation. Researchers estimated the prevalence of different error types, including coherent errors and control leakage, and then implemented error suppression strategies using pulse-shaping and compensating gates. The application of these techniques resulted in an average 3.7x reduction in error rate for two-qubit operations across a chain of 16 qubits.

The median error rate improved significantly, decreasing from 4.6% to 1.2% as measured by interleaved randomized benchmarking. Notably, the most substantial improvements were observed in previously under-performing qubit pairs, effectively reducing the distribution of low-fidelity gates and enhancing overall device performance. The authors acknowledge a discrepancy between characterized errors and benchmarking results, suggesting the presence of unidentified error sources, potentially related to the control qubit’s X(π) operation. Future research may focus on optimizing ZZ error suppression by integrating compensating pulses within the cross-resonance pulse itself, or by employing a rotary echo scheme to further reduce spectator errors. This advancement offers a practical pathway to enhance quantum computer performance without requiring additional hardware, paving the way for more reliable and efficient quantum algorithms.