Tram: Qubit Mapping Algorithm Achieves 12.28% Fidelity Improvement with Transverse Relaxation Time Awareness on NISQ Devices

Quantum computers promise revolutionary computational power, but current noisy intermediate-scale quantum (NISQ) devices present significant challenges due to limited qubit connectivity and the rapid loss of quantum information through decoherence. Yifei Huang, Pascal Jahan Elahi, and Kan He, alongside colleagues from Taiyuan University of Technology and the Pawsey Supercomputing Research Centre, address this problem with a new qubit mapping algorithm called TRAM. This innovative approach moves beyond simply optimising for hardware layout and instead prioritises minimising the impact of decoherence, a key source of errors in quantum computations. By intelligently partitioning qubits and scheduling operations to anticipate and mitigate coherence decay, TRAM demonstrably improves performance, achieving higher fidelity, reducing the number of necessary quantum gates, and shortening circuit execution time compared to existing methods, marking a crucial step towards practical quantum computing.

NISQ Devices, Qubit Limitations and Error Mitigation

This document provides a comprehensive overview of the challenges and potential solutions for building and operating practical quantum computers, specifically focusing on noisy intermediate-scale quantum (NISQ) devices. It explores a wide range of topics, from the physical characteristics of qubits and their limitations, to software techniques for mitigating errors and improving performance. A central theme is the need to overcome hardware limitations through clever software and compilation strategies. The research heavily focuses on superconducting qubits as the primary hardware platform, detailing the materials used in their fabrication and the challenges associated with maintaining coherence and minimizing noise.

A significant point is that qubits are not identical; their properties vary even within the same device, creating a major source of error that requires careful consideration in software design. The document identifies numerous sources of noise that affect qubit performance, including unintended interactions between qubits, loss of quantum information due to environmental interactions, fluctuations in qubit frequencies, and imperfections in control pulses. Thorough characterization of qubit properties and noise profiles is essential, utilizing techniques like randomized benchmarking, quantum volume measurement, and tomography. A large portion of the document is dedicated to techniques for dealing with errors in NISQ devices.

Randomized benchmarking assesses the average fidelity of quantum gates, while error mitigation techniques reduce the impact of errors without full quantum error correction. These include dynamical decoupling, zero-noise extrapolation, and probabilistic error cancellation. Error-aware compilation optimizes quantum circuits to minimize the impact of known errors, and techniques to reduce crosstalk errors, including careful qubit placement and pulse shaping, are also explored. The document highlights the crucial role of software in maximizing the performance of NISQ devices. Compilation translates high-level quantum algorithms into low-level control pulses, and qubit mapping assigns logical qubits to physical qubits, considering connectivity constraints and qubit properties.

Pulse scheduling optimizes the timing and shape of control pulses to minimize errors and maximize fidelity, and variability-aware compilation adapts the compilation process to account for the unique characteristics of individual qubits. Multi-programming and noise-adaptive compilation further enhance performance. The research explores techniques like tomography, which reconstructs the quantum state of a system, quantum volume, a metric for assessing overall performance, density matrix theory, a framework for describing quantum states, and shadow tomography, an efficient technique for reconstructing quantum states. The document concludes that NISQ devices are inherently noisy, making error mitigation essential for achieving meaningful results. Software plays a critical role in maximizing performance, and thorough characterization is key to developing effective error mitigation strategies. Addressing qubit variability is essential for achieving high fidelity, and continued development of error mitigation techniques, improved qubit characterization methods, and more sophisticated compilation algorithms are needed to unlock the full potential of quantum computing.

Decoherence-Aware Qubit Mapping with Time-Coupled Optimisation

Scientists have developed Transverse Relaxation Time-Aware Qubit Mapping (TRAM), a novel compilation framework that directly addresses decoherence, a major challenge in quantum computing. Unlike existing methods that prioritize hardware topology and static calibration, TRAM treats qubit mapping as a dynamic process influenced by both connectivity and the evolving coherence of qubits over time. This approach redefines qubit mapping as a noise-aware and time-coupled optimization problem, bridging the gap between hardware calibration data and compiler-level decision-making. The research pioneered a three-stage framework beginning with Community Detection-assisted Quantum Transverse Relaxation Partitioning (CQTP).

This initial stage constructs a noise-aware abstraction of the quantum hardware by meticulously analysing calibration data, including two-qubit gate errors, readout errors, and crucially, transverse relaxation times (T2). By leveraging this data, CQTP identifies qubit communities based on both connectivity and coherence, effectively partitioning the hardware to minimize the impact of decoherence. Following partitioning, TRAM generates time-weighted initial mappings that anticipate coherence decay. This involves strategically assigning logical qubits to physical qubits based on their T2 values, prioritizing qubits with longer coherence times for operations most susceptible to noise.

The team then dynamically schedules SWAP operations to minimize cumulative error accumulation throughout the circuit execution, ensuring that qubits remain coherent for as long as possible. Evaluated using Qiskit-based simulators with realistic noise models, TRAM demonstrably outperforms the widely adopted SABRE algorithm, achieving a 3. 59% improvement in fidelity, reducing the total gate count by 11. 49%, and shortening circuit depth by 12. 28%. These results establish coherence-aware optimization as an essential component of practical quantum compilation, particularly in the era of noisy intermediate-scale quantum devices.

TRAM Improves Quantum Fidelity Through Coherence Mapping

Scientists have achieved a significant breakthrough in quantum compilation, developing a new framework called TRAM, which stands for Transverse Relaxation Time-Aware Qubit Mapping. This work addresses the critical challenges posed by noisy intermediate-scale quantum devices, specifically limited qubit connectivity and the degradation of quantum information due to decoherence. The team’s research demonstrates that explicitly accounting for coherence dynamics during the mapping of quantum algorithms onto physical hardware yields substantial improvements in performance. Experiments reveal that TRAM outperforms existing methods, notably SABRE, by 3.

59% in fidelity. This improvement stems from TRAM’s ability to integrate calibration-informed community detection, which creates noise-resilient qubit partitions, and time-weighted initial mappings that anticipate coherence decay. Furthermore, the framework dynamically schedules SWAP operations, minimizing the accumulation of errors during computation. Data shows that TRAM reduces the number of two-qubit gates required by an average of 11. 49% and shortens overall circuit depth by 12. 28%, both of which contribute to more efficient and reliable quantum computations. The team developed a noise-simulated environment.